Results for “cpu”

Configures best-practice, high-signal alerting policies for Google Cloud Run resources (services, jobs, and worker pools) based on seasoned SRE practices. Use when analyzing, recommending, writing, or deploying Terraform PromQL alerting policies to monitor Cloud Run error rates (4xx/5xx), request latency, container instance saturation (warning/critical), container CPU/memory utilization and allocation, billable instance time, job execution status, and worker pool queue backlog. Don't use for GKE workloads (use gke-alert-configuration) or Compute Engine VMs.

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Optimizes GKE costs, rightsizes workloads, and configures Spot VMs, CUDs, cost allocation, and resource quotas. Use when optimizing GKE cluster or workload costs, configuring GKE cost allocation or quotas, rightsizing CPU/memory requests, or selecting Spot VMs and machine types. Don't use for general compute class provisioning or GPU Selection (use gke-compute-classes instead).

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Access ENCODE uniform analysis pipelines, generate user-specific Nextflow/WDL pipelines, manage compute resources, and integrate with cloud platforms. Use when the user wants to understand ENCODE pipelines, run pipelines on their own data, generate custom Nextflow workflows from ENCODE pipeline code, check compute requirements (CPU/GPU/memory), run pipelines in background, or integrate with Google Cloud, AWS, or other cloud platforms. Also use when the user asks about ENCODE pipeline outputs, processing standards, software versions, or wants to replicate ENCODE processing. Covers local execution, HPC, and cloud deployment with resource-aware scheduling. Use this skill for ANY pipeline execution, workflow generation, or compute resource management task involving ENCODE data.

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Use when a Lightning record page, home page, or app page is slow to load or render — covers Experienced Page Time (EPT) analysis, component count reduction, progressive disclosure via tabs and conditional rendering, Lightning Experience Insights diagnostics, and DOM/XHR minimization strategies. Triggers: 'Lightning page is slow', 'EPT is high', 'record page takes too long to load', 'too many components on page', 'Lightning Experience Insights shows slow page', 'how to optimize Lightning page performance'. NOT for Visualforce page performance (separate concern). NOT for Apex or SOQL query optimization (use apex/apex-cpu-and-heap-optimization or data/soql-query-optimization). NOT for report or dashboard performance (use admin/report-performance-tuning).

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Router for the 159 SfSkills `apex` skill packages. Apex and SOQL: triggers, Apex governor limits, async processing, OUTBOUND HTTP callouts, security enforcement, and test patterns. Owns calling an external API FROM Salesforce; salesforce-integration owns inbound. Generic nightly scheduling without naming code belongs to salesforce-flow. Codebase security review belongs to salesforce-security. NOT for SOSL — use salesforce-data. Use when the request mentions Apex, trigger, SOQL, Apex governor limit, batch, queueable, @future, schedulable, test class, CPU time, heap, with sharing, StripInaccessible, callout, HTTP callout, HttpRequest, call an external API, consume a REST API from Apex, Named Credential in Apex, HttpCalloutMock, Apex REST service. Finds and opens the exact skill package to read; it does not contain the guidance itself.

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Use when pulling or downloading a new llamacpp model. The active ROCm image (kyuz0/amd-strix-halo-toolboxes) fails to start in the ephemeral pull container without ROCm device access. Must temporarily switch to the standard CPU image.

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Firmware development for the LGT8F328P-LQFP32 MiniEVB — the Nano-style 30-pin "purple nano" board whose silkscreen reads LGTBF32BP (also sold as BTE21-15A, WAVGAT, LGT8F328P Nano V3.0), built on the Logic Green / Prodesign LGT8F328P, an AVR-instruction-compatible LGT8XM part with a 32 MHz internal RC and no crystal, a 12-bit ADC, an 8-bit DAC on D4, four timers, 80 mA drive pins, SWD instead of ICSP, and EEPROM emulated in program flash. Use when working on this board, any LGT8F328P/LGT8F328D/LGT8FX8P board, or a sketch being ported from an Arduino Nano or ATmega328P: PlatformIO setup with the lgt8fx core, platformio.ini, f_cpu/f_osc/clock_source and why timings come out 2x wrong, pin mapping and the LQFP32 bonded pads, analogRead resolution and reference errors, analogWrite hitting the DAC, EEPROM vanishing after upload, 80 mA outputs, upload failures over CH340/CH9340/HT42B534, SWD recovery, or debugging why something on the board does not work.

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Scaffold a Makefile-driven, CPU-bus-controlled testbench project for an IP and generate a comprehensive set of self-checking testcases, validate each with make, and write a testcase list

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VAE/TAE 解码段优化（**计算 + 通信同技能**）：判断解码器能否沿某个轴切到多张卡、怎么切才是逐位精确、切了值不值；给出可复用的等价性证明流程、状态携带切分代码模式与交换预算判据。范围**含 VAE encode（待补：当前无内容，暂不纳入正文）**。当用户问“VAE/TAE 解码能不能分卡/切分/分摊”“8 张卡重复解码能不能省”“按帧轴还是空间轴切”“切完结果会不会变”“怎么证明等价”“all-gather 拼回来对不对”，或任何“多卡把解码摊开、又要保证输出不变”的场合都应触发；即使用户没说“分片”二字，只要出现“解码每卡都解一遍”“解码太慢想摊到多卡”“那部分重复计算能不能省”也应触发。覆盖：跨轴耦合算子审计（含递归 MemBlock 前缀依赖的否证）、潜帧边界切分＋每块末帧状态携带、与 rank 无关的判定（否则死锁）、交换预算核算、已知静默陷阱（all_gather_into_tensor 填栈副本、repeat_interleave 多分配整张量、rank 选举式参与）、有损分片的精确性前置条件与自动修复、CPU 真值→分段 bitwise→端到端 md5→帧级健康指标的四道验证闸、分片“到底有没有生效”的状态量判定，以及“切分顺带绕过设备缺陷”的用法。边界（本技能只引用不复制）：计算手段与能力供给见 `pattern-dev` / `operator-dev`，DiT 侧选档参照 `dit-perf-opt`；通信方法论（形态/掩盖/通信账/归因）见 `dit-parallel-opt`；一致性判据见 `accuracy-gate`；数字入库见 `perf-gate`；交付搬运与装载预热等 host 固定开销见 `host-opt`（不属本技能）。

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**精度验收标准**：凡是"改动不应改变结果"的场合（等价替换、算子/子模块融合、并行切分、 编译与图下发、拷贝消减），都按本标准判"合格 / 不合格"——等价分层（L1 逐位 / L2 数值门 / L3 有损门）+ 三级验收序（① 同配置重跑逐位 → ② 跨配置数值门 + 产物 md5 不变 → ③ 质量门）+ 判据不达标时的排障入口。当用户说"这个算子能不能换个写法/换个 kernel/等价实现/ 无损替换""替换后结果会不会变""怎么证明逐位一致""结果不对""花屏""尾部塌了" "CPU 跑对 NPU 跑不对"，或发现某个 hotspot 占了大头（例如某类算子在阶段里占 90% 以上）想动手时， 都应触发；即使用户只说"这样改有没有把结果改坏""能不能判它是无损的"也应触发。 覆盖：等价分层与判据、满足本标准的实现约定（per-shape 对拍写进实现，把索引/相位/顺序类重写 错误在首次调用抓住）、per-shape 条件性等价（同一改动在不同形状下结论可能不同）、 判据不达标 → `references/silent-failure-localization.md` 排障入口、否决案例的形态学 （换写法未换 kernel / 差异极小仍非逐位 / 等价但 OOM）、以及收益口径的归属（性能数字一律交 `perf-gate`）。 **近义分流**：选量化档 / 特性选档（要不要开量化、开哪一档）→ `dit-perf-opt`； 并行选型（USP / CP / TP 怎么切）→ `dit-parallel-opt`；本技能只判"结果是否被改变"， 不负责选档与选型。

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Use when CPU usage is high, memory grows unboundedly, goroutines leak, mutex contention shows in traces, or escape analysis suggests excess heap allocation. Triggers: net/http/pprof endpoint exposure, go tool pprof analysis, flamegraph generation, allocs vs inuse_space heap profiles, runtime/trace event timeline, mutex profiling, block profiling, goroutine dumps, GC pressure measurement. NOT for non-Go languages, distributed tracing (use OpenTelemetry skill), or production telemetry pipelines.

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Use when wrangler deploys silently fail or produce wrong artifacts, secrets upload as empty strings, custom domain DNS is not resolving, route assignment broke after rename, observability/tail logs are needed, D1/KV/R2 bindings are missing, OAuth scope errors block a command, cookies on a redirect are not attaching, or the worker exceeds CPU time. Triggers: "Tenant or user not found", "Authentication error" on wrangler d1 push, secret length is 0 after upload, route returns origin not worker, "compatibility_date too old", 1101 errors, custom_domain assignment lost on script rename. NOT for AWS Lambda / Vercel Edge / Deno Deploy (different runtimes), Cloudflare Zero Trust, or R2-specific tuning.

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Design multi-tier caching architectures for web applications — cache-aside vs write-through vs write-behind, TTL design, cache invalidation, Redis patterns, CDN configuration, browser caching, and stampede prevention. Use when choosing a caching pattern, designing cache invalidation strategies, implementing Redis caching, configuring Cache-Control headers, or preventing cache stampedes. Activate on "cache invalidation", "cache-aside", "write-through", "TTL", "Redis cache", "CDN caching", "cache stampede", "stale data", "browser cache". NOT for database query caching within an ORM, memoization of pure functions, or CPU-level caching.

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Inspect reviewed Grafana infrastructure evidence for host or fleet CPU usage, memory load, disk space, and system load. Use for server-health checks, capacity symptoms, resource saturation, disk pressure, cloud or local host comparisons, and bounded infrastructure triage.

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Develop, challenge, and document Chisel processor microarchitecture designs before implementation. Use when discussing or writing design documents for processor pipelines, queues, issue logic, rename, ROB, LSU, caches, MSHRs, forwarding, wakeup, replay, flush, privilege, exceptions, or other cycle-accurate hardware mechanisms; when converting design conversations into stable Markdown specifications; or when reviewing a proposed Chisel CPU design for correctness, timing, area, verification cost, and cross-document consistency.

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Own the lifecycle of short-lived paid CPU/GPU hosts and attached resources, from bounded provisioning through verified permanent deletion. Use when renting, extending, retiring, or recovering billable remote resources; campaign scheduling belongs to run-ephemeral-hosts.

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Measure real frontend performance — Core Web Vitals (LCP, CLS, INP), page-load traces, CPU and network throttling, Lighthouse accessibility/SEO scores, and heap growth — using chrome-devtools-mcp against a live browser. Trigger when asked "is the page fast enough", "measure Core Web Vitals", "why is this route slow", "run Lighthouse", "check for a memory leak", before any performance-gated certification (Built for Shopify, Core Web Vitals thresholds, store listing review), and before any launch or traffic-multiplier event. Measurement only — this skill never drives functional journeys.

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Systematically find and fix performance problems in applications, frontend and backend, by measuring first. Use this skill whenever the user reports slow endpoints, high latency, poor throughput, memory leaks, large bundles, or slow page loads; wants to profile with cProfile, py-spy, Chrome DevTools, Node --cpu-prof, or perf; run load tests with locust or k6; set performance budgets or SLOs; optimize database queries (EXPLAIN, indexes, N+1); add caching (Redis); improve frontend performance (code splitting, lazy loading, image optimization, memoization, virtualization); or tune the network (CDNs, gzip/br, HTTP/2/3). Also trigger for p50/p95/p99 latency, throughput, error rate, connection pooling, async vs threads, GIL, and memory leak investigations.

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Comprehensive, measurement-driven performance optimization for latency, throughput, memory/GC, and tail behavior. Use when the user asks to optimize/speed up, reduce latency (p95/p99), increase throughput/QPS, lower CPU/memory/allocations/GC pauses, profile hot paths, or run a benchmarked perf pass (including JSONL/query-heavy code). Requires before/after measurement on a runnable workload (or an explicit `UNMEASURED` plan) plus a correctness gate.

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Implementação educacional do GPT em ~300 linhas. Reproduz o GPT-2 (124M) em OpenWebText. Código limpo e hackeável para aprender transformers. Por Andrej Karpathy. Perfeito para entender a arquitetura do GPT do zero. Treine em Shakespeare (CPU) ou OpenWebText (multi-GPU).

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Processamento escalável de dados para workloads de ML. Execução em streaming em CPU/GPU, suporta Parquet/CSV/JSON/imagens. Integra-se com Ray Train, PyTorch, TensorFlow. Escala de uma única máquina para centenas de nós. Use para inferência em lote, pré-processamento de dados, carregamento de dados multi-modal ou pipelines distribuídos de ETL.

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Postgres best practices maintained by Supabase, for Postgres running anywhere. Load this skill BEFORE writing or changing anything that lives in a Postgres database: creating or altering tables and columns (including choosing column types), schema design, migrations and declarative schema files, RLS policies and the tests that verify them, indexes, triggers, database functions, queues and scheduled jobs (pg_cron, pgmq), vector/semantic search (pgvector), and restoring dumps (pg_restore) or importing data. Also load it when diagnosing slow queries, high CPU, timeouts, EXPLAIN plans, connection exhaustion, locking, bloat, or rows visible to the wrong user or tenant. This is not just a performance guide — schema, migration, security, and SQL authoring tasks need these rules too, even for a one-column change or a single query.

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Profiles macOS and iOS apps with Instruments and xctrace: choosing templates such as Time Profiler, launching binaries with arguments, recording traces, and exporting results. Use when a Mac or iOS app needs CPU, memory, or responsiveness profiling.

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Validate Commodore 64 memory map, PLA/bank switching, 6510 port $0000/$0001 behavior, VIC bank selection, color RAM, ROM/RAM overlays, cartridge mapping, and mirrored I/O in the EMULATORS C64 namespace. Use when Codex reviews or edits C64 memory, PLA, CPU-visible address decoding, VIC-visible memory, color memory, char ROM, cartridge, expansion I/O, or mapped chip register behavior.

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