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Results for “processor”

397 skills · sorted by relevance

Add or verify model support in SGLang's Rust processor so chat requests produce the same prompt text and token IDs as Python. Use reference-generated test cases to find differences in tools, reasoning settings, conversation history, and errors.

  • Adding model support to sglang-processor
  • Porting model rendering from sgl-router
  • Rechecking prompt behavior after a Dynamo update
sgl-project/sglang37.5KUpdated Oct 20, 2026

Creates GDPR Article 30(2) Records of Processing Activities for data processors with all four mandatory fields: processor and controller names and contact details, categories of processing, third country transfers, and security measures description. Activate for processor RoPA, Art. 30(2), processor records, sub-processor documentation.

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mukul975/Privacy-Data-Protection-Skills314Updated Mar 17, 2026

Use this skill when the company acts as a processor for its customers and someone asks "update our subprocessor list", "are we missing subprocessors", "we added a new tool, do we need to tell customers", "check the public subprocessor page", "where is customer data processed" or "draft the subprocessor change notice". Finds which suppliers actually receive customer personal data, compares them with the published list, records purpose, data, locations and transfer basis for each, works out the customer notice duties from the signed agreements, and writes an updated register, a change list and a draft notice for review.

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better-isms/grcskills10Updated Oct 20, 2026

Conducts Privacy Impact Assessment for vendor and third-party data processing arrangements. Covers processor due diligence, Data Processing Agreement (DPA) requirements under GDPR Article 28, sub-processor management, cross-border vendor transfers, cloud service provider assessments, and ongoing vendor monitoring. Keywords: vendor PIA, processor assessment, DPA, Article 28, sub-processor, cloud privacy, third-party risk.

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mukul975/Privacy-Data-Protection-Skills314Updated Mar 17, 2026

Write integration tests for core error processors by simulating API failures with a mock model. Check retry attempts, changes to conversation messages, and streamed responses, with guidance on test setup and diagnosing empty output.

  • Check retries and message changes after API errors
  • Diagnose empty output in streaming tests
  • Verify unrelated errors pass through unchanged
mastra-ai/mastra29KUpdated Oct 20, 2026

compliance

FreeSummary

Manage the recorded list of vendors that process customer data and check advance notices and audit evidence. The skill also explains temporary staff access to customer accounts, including access limits, revocation, and the actions recorded in customer audit logs.

  • Adding a vendor that processes customer data
  • Checking notice timing before sending data to a new vendor
  • Retrieving notification evidence for an auditor
kortix-ai/suna20.3KUpdated Oct 20, 2026

GDPR Article 28(2) sub-processor approval workflow management. Covers prior specific and general authorization mechanisms, change notification procedures, objection windows, flow-down obligation enforcement, and sub-processor chain risk monitoring.

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mukul975/Privacy-Data-Protection-Skills314Updated Mar 17, 2026

Guides the creation and review of data processing agreements under GDPR Article 28(3), covering all eight mandatory clauses. References the 2021 Standard Contractual Clauses and provides a compliance checklist for processor contracts. Activate when onboarding processors, reviewing DPAs, or auditing processor compliance. Keywords: DPA, data processing agreement, Article 28, processor, mandatory clauses, standard contractual clauses.

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mukul975/Privacy-Data-Protection-Skills314Updated Mar 17, 2026

Initialize or safely upgrade a processor project's root AGENTS.md from a maintained baseline. Use when starting a processor project, adding project-level Agent collaboration rules, or comparing an existing AGENTS.md with the package baseline. This skill only handles AGENTS.md; it does not scaffold documentation, inspect or configure environments, install tools, or modify processor source.

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sixblade325/WaterHand-Processor-Development-Skills16Updated Oct 3, 2026

Determines controller-processor relationships for AI services and conducts privacy due diligence. Covers SaaS AI (processor), embedded AI (joint controller), API-based AI (assessment framework), and vendor risk assessment. Keywords: AI vendor, controller-processor, due diligence, SaaS AI, joint controller, Art. 28.

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mukul975/Privacy-Data-Protection-Skills314Updated Mar 17, 2026

Reviews YUP audio plugin code for YUP-specific correctness issues: AudioProcessor lifecycle, AudioParameterBuilder and AudioParameterHandle usage, editor gestures, AudioBusLayout handling, CLAP/VST3 wrapper contracts, state recall, and MIDI safety. Use when the user asks to review a YUP plugin, check a processBlock, audit parameter smoothing, or asks "is this YUP code safe?". Trigger when you see yup::AudioProcessor, yup_audio_plugin, AudioParameterBuilder, AudioParameterHandle, AudioProcessorEditor, or createPluginProcessor in the code.

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kunitoki/sonic-skills22Updated May 21, 2026

Reviews JUCE audio plugin code for JUCE-specific correctness issues: thread safety, APVTS parameter patterns, MessageManager usage, ValueTree, and MIDI handling. Use when the user asks to review a JUCE plugin, check a processBlock, audit parameter handling, or asks "is this JUCE code safe?". Trigger on phrases like "review my JUCE plugin", "check my AudioProcessor", "is this APVTS usage correct?", or when you see AudioProcessor, AudioProcessorEditor, or AudioProcessorValueTreeState in the code.

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kunitoki/sonic-skills22Updated May 21, 2026

Develop, challenge, and document Chisel processor microarchitecture designs before implementation. Use when discussing or writing design documents for processor pipelines, queues, issue logic, rename, ROB, LSU, caches, MSHRs, forwarding, wakeup, replay, flush, privilege, exceptions, or other cycle-accurate hardware mechanisms; when converting design conversations into stable Markdown specifications; or when reviewing a proposed Chisel CPU design for correctness, timing, area, verification cost, and cross-document consistency.

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sixblade325/WaterHand-Processor-Development-Skills16Updated Oct 3, 2026

Review personal data handling against GDPR requirements, covering processing records, legal grounds, individual rights, breach procedures, and international transfers. Produce findings by article and a prioritized improvement roadmap with responsibilities, estimated costs, and timelines.

  • Preparing evidence for a regulatory audit
  • Reviewing privacy requirements for a new system
  • Assessing GDPR gaps during acquisition due diligence
mukul975/Anthropic-Cybersecurity-Skills34.8KUpdated Aug 31, 2026

GDPR-compliant Data Processing Agreement drafting per Article 28(3). Covers all 8 mandatory provisions including subject matter, duration, nature and purpose, data types, categories of data subjects, controller and processor obligations, and sub-processor cascade requirements.

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mukul975/Privacy-Data-Protection-Skills314Updated Mar 17, 2026

Guides DPIA for migrating personal data to cloud infrastructure covering controller-processor analysis under Art. 28, international transfer assessment, encryption requirements, and shared responsibility model evaluation. Activate for cloud adoption, SaaS procurement, or data centre migration projects. Keywords: cloud migration, DPIA, Art. 28, processor, encryption, shared responsibility, SaaS, IaaS, PaaS.

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mukul975/Privacy-Data-Protection-Skills314Updated Mar 17, 2026

Establish, author, restructure, or audit human-first processor Architecture, Design, Research, Review, and Verification documentation. Use for progressive documentation scaffolding, authority maps, reading paths, document-type content contracts, length-budgeted splitting, or maintainability reviews. Do not use as a substitute for cycle-accurate microarchitecture analysis or RTL implementation.

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sixblade325/WaterHand-Processor-Development-Skills16Updated Oct 3, 2026

Document-driven workflow for implementing, reviewing, and verifying Chisel processor and memory-subsystem RTL. Use when Codex must work from maintained Architecture and Design, trace a complete integration surface, reason in synthesized-hardware terms, keep source-adjacent _codex.md summaries current, avoid redundant or overprotective logic, or run focused functional verification.

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sixblade325/WaterHand-Processor-Development-Skills16Updated Oct 3, 2026

Use this skill when a company with a security applicability statement extends its management system to privacy or to AI, and asks "extend our SoA for privacy", "which privacy controls apply to a processor", "AI controls applicability", "SoA for our AI management system", "are we controller or processor for this" or "do the AI development controls apply if we only use a model". Settles the company's role per processing activity and per AI system, decides applicability of the additional controls from those roles and the risk or impact assessments, and writes an extension to the applicability statement plus role and scope notes.

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better-isms/grcskills10Updated Oct 20, 2026

Implement or extend a CPU architecture, processor variant, instruction set, addressing modes, registers, interrupts, bus transactions, disassembly, timing, and processor tests in EMULATORS. Use when adding a processor not yet emulated, deriving a CPU from F6500, FZ80, or another family, filling missing opcodes, correcting instruction semantics or cycles, or creating exhaustive instruction and interrupt tests.

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Commnets/EMULATORS10Updated Oct 18, 2026

cpu-kernel

FreeSummary

Develop or port CPU kernels, the low-level calculation routines used by MNN. Follow staged implementation guidance, check data layout agreements, register functions, and verify correctness across processor instruction sets and numerical precision settings.

  • Implementing or porting an MNN CPU kernel
  • Adding support for a processor instruction set
  • Changing packed data layouts or tile sizes
alibaba/MNN16.3KUpdated Oct 20, 2026

cpu-optimize

FreeSummary

Find why MNN CPU inference is slow by examining threads, scheduling, memory layout, and the processor instruction path actually used. Operator-level measurements and comparisons with other inference frameworks help identify which layer needs improvement across ARM, x86_64, and RISC-V.

  • Investigate slow CPU operators or LLM inference
  • Diagnose thread count and memory usage anomalies
  • Locate the cause of a performance regression
alibaba/MNN16.3KUpdated Oct 20, 2026

Azure Event Hubs SDK for .NET. Use for high-throughput event streaming: sending events (EventHubProducerClient, EventHubBufferedProducerClient), receiving events (EventProcessorClient with checkpointing), partition management, and real-time data ingestion. Triggers: "Event Hubs", "event streaming", "EventHubProducerClient", "EventProcessorClient", "send events", "receive events", "checkpointing", "partition".

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microsoft/skills3.1KUpdated Oct 18, 2026

Expert ISO 27701 Privacy Information Management System (PIMS) compliance advisor. Use this skill whenever a user asks about ISO/IEC 27701:2025, ISO/IEC 27701:2019, privacy information management, PIMS certification, PII controller or processor obligations, privacy risk assessment, Statement of Applicability for privacy, privacy by design, data subject rights, DPIA, records of processing activities, transitioning from ISO 27701:2019, GDPR alignment with ISO 27701, or any privacy management system topic. Also trigger for questions about Annex A.1 (controller controls), A.2 (processor controls), A.3 (shared security controls), or implementing a standalone PIMS without ISO 27001. When in doubt, use this skill — it covers the full ISO 27701 lifecycle from gap assessment through certification.

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Sushegaad/Claude-Skills-Governance-Risk-and-Compliance969Updated Oct 10, 2026