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multicore

Developing for multicore systems in Zephyr RTOS. Covers Symmetric Multiprocessing (SMP), Asymmetric Multiprocessing (AMP) with OpenAMP/RPMsg, inter-processor communication (IPC) patterns, and Linkable Extensions (LLEXT). Trigger when designing for SoCs with multiple homogeneous or heterogeneous cores.

The English summary is being prepared. Showing the original description.

See how to install

Files included (9)

  • SKILL.md3.6 KB
  • assets/rpmsg_channel_contract.md630 B
  • references/ipc_patterns.md2.4 KB
  • references/llext_basics.md2.2 KB
  • references/multidomain_sysbuild.md2.4 KB
  • references/openamp_rpmsg.md2.0 KB
  • references/smp_configuration.md1.8 KB
  • scripts/smp_config_check.py1.8 KB
  • skill-meta.yaml636 B

SKILL.md (original)

Review the instructions the agent will receive before you install.

Zephyr Multicore Development

Leverage multiple CPU cores to increase performance, isolate critical tasks, and integrate heterogeneous systems.

Core Workflows

1. SMP Configuration

Run the Zephyr kernel and your threads across multiple identical cores.

2. OpenAMP & RPMsg

Communicate between heterogeneous cores (e.g., A-series and M-series) using standard protocols.

  • Reference: openamp_rpmsg.md
  • Key Tools: CONFIG_OPENAMP, message vrings, Resource Tables.

3. IPC Patterns

Implement efficient data exchange between cores using high-level services or low-level mailboxes.

  • Reference: ipc_patterns.md
  • Key Tools: IPC Service, IPM drivers, Shared Memory.

4. LLEXT (Linkable Extensions)

Dynamically load and run binary modules at runtime without a full firmware update.

  • Reference: llext_basics.md
  • Key Tools: CONFIG_LLEXT, dynamic ELF loading, Symbol Export.

5. Multi-domain SoCs (nRF5340)

Build separate application-core and network-core images in one Sysbuild invocation.

  • Reference: multidomain_sysbuild.md
  • Key Tools: west build --sysbuild, CONFIG_NRF53_BOOT_NETWORK_CORE_ON_STARTUP, domains.

Quick Start (SMP prj.conf)

# Enable SMP for dual-core SoCs
CONFIG_SMP=y
CONFIG_MP_NUM_CPUS=2
// Using spinlocks for cross-core sync
struct k_spinlock lock;
k_spinlock_key_t key = k_spin_lock(&lock);
// ... critical section ...
k_spin_unlock(&lock, key);

Professional Patterns (Architecture Design)

  • Linux Bridging: Use OpenAMP/RPMsg to bridge Zephyr real-time logic with a Linux application controller.
  • Core Isolation: Pin high-frequency interrupts (e.g., motor control) to Core 1 and keep the main application on Core 0 to prevent jitter.
  • Zero-Copy Transfers: Use shared memory regions for large data (video/audio) and only pass meta-data via IPC channels to minimize overhead.

Automation Tools

Examples & Templates

Validation Checklist

  • SMP builds run with expected CPU count and no cross-core race regressions.
  • OpenAMP/RPMsg endpoint exchange passes bidirectional message tests.
  • IPC latency and throughput remain within target budget under load.
  • LLEXT module load/unload path resolves symbols and handles failure cases safely.
  • Multi-domain Sysbuild builds both core images and west flash programs each domain.

Resources

  • References:
    • smp_configuration.md: Configuration and spinlocks.
    • openamp_rpmsg.md: AMP and Linux interoperability.
    • ipc_patterns.md: Mailboxes and high-level IPC services.
    • llext_basics.md: Dynamic code loading.
  • Scripts:
    • smp_config_check.py: SMP config consistency checker.
  • Assets:
    • rpmsg_channel_contract.md: RPMsg interface contract template.

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