312건 · 관련도순
Use when tuning or profiling native code on Apple M-series Macs: unified memory, 16 KiB pages, Accelerate and Metal for matrix work, xctrace and leaks, Rosetta 2, or sysctl hardware queries.
한국어 요약은 준비 중입니다. 원문 설명을 표시하고 있습니다.
Coordinate an evidence-gated electronic product and PCBA workflow from an idea, circuit description, schematic, netlist, PCB, BOM, or fabrication package through a reviewed order. Use for end-to-end requests, multi-stage hardware projects, workflow recovery, gate tracking, change invalidation, or deciding which specialist skill is required next.
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Interactively gather parameters for `python -m cli.inference.text_generate`, generate a concrete text generation simulation command, explain assumptions, ask for execution confirmation, then run the command and summarize performance metrics. Use when the user wants to validate a specific model, hardware profile, batch/query size, prefill or decode scenario, TP/DP/EP/MOE parallel strategy, profiling database, chrome trace, empirical metrics export, or a best row produced by throughput_optimizer.
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Visual design audit for iOS apps on real hardware. (gstack).
한국어 요약은 준비 중입니다. 원문 설명을 표시하고 있습니다.
Blazing inference on Cerebras wafer-scale hardware — ultra-fast open-model APIs for speed-critical workloads.
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BLE scanning/connecting/GATT operations with react-native-ble-plx, NFC tag reading/writing with react-native-nfc-manager, permissions, background mode, battery-efficient patterns
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Use when a task needs the judgment of an Electronics Engineer working on RF, analog, and mixed-signal hardware — closing an RF link budget for a wireless telemetry radio, sizing an op-amp or instrumentation-amplifier front end against a gain-bandwidth constraint, designing an anti-alias or IF filter to a cutoff and Q, pre-checking a design against FCC/IEC EMC radiated-emissions limits before formal compliance testing, or picking between a superheterodyne and direct-conversion receiver architecture.
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Use when a task needs the judgment of an Embedded/Firmware Engineer — analyzing worst-case execution time for a hard real-time deadline, choosing static over dynamic memory allocation to avoid fragmentation on a long-uptime device, keeping an interrupt service routine minimal and deferring work to the main loop, synchronizing a variable shared between an ISR and main context to prevent a torn read, or verifying a hardware register interaction against the datasheet's exact timing rather than observed bench behavior.
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Use when a task needs the judgment of a systems engineer/architect working at the whole-program level — decomposing requirements across hardware/software/network subsystems, writing or reviewing an interface control document (ICD), making a build-vs-buy tradeoff for a subsystem, or tracing a verification failure back through the requirements baseline. Distinct from a software engineer (owns one service's code) or DevOps/SRE (owns operational reliability) — this role owns the technical baseline for a whole system-of-systems and is accountable when subsystems built by different teams or vendors don't fit together.
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Use when a task needs the judgment of an Aerospace Engineering and Operations Technologist/Technician — verifying an installed fastener's preload against a drawing's torque callout via the T=K·D·F relationship, reducing strain-gauge data from a structural proof-load test into stress and checking it against an FEA-predicted margin, selecting and executing an NDI method against a defect type and material, reducing a wind-tunnel test point's dynamic-pressure and Reynolds-number data, or ballooning and dispositioning an AS9102 first article inspection. Distinct from an aerospace-engineer (owns the design, structural analysis, and certification basis) — this role builds, instruments, tests, and inspects the hardware the engineer specified, closing the loop with measurement rather than deriving a new analysis.
한국어 요약은 준비 중입니다. 원문 설명을 표시하고 있습니다.
Guides the migration of existing AI workloads (Cloud Run, Gemini API, Gemini Enterprise Agent Platform) to self-hosted GKE inference using gcloud and kubectl. Use when the user has an existing AI inference workload (on Cloud Run, the Gemini API, Gemini Enterprise Agent Platform, or a custom VM) and wants to move it to self-hosted inference on GKE, or asks follow-up questions during such a migration (hardware sizing, model staging, manifest generation, validation, traffic cutover). DO NOT use for brand new GKE inference deployments with no existing workload to migrate (use gke-inference instead). DO NOT use if the user intends to automate the migration via the Gemini Cloud Assist MCP server.
한국어 요약은 준비 중입니다. 원문 설명을 표시하고 있습니다.
Provides guidance and instructions on managing remote devices on Developer Device Platform (DDP). Use when reserving remote Android devices, establishing connection tunnels, checking session status, or extending/cancelling leases. Don't use for iOS or local device/hardware inquiries.
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Diagnoses, predicts, and mitigates node disruptions during Compute Engine host maintenance and hardware or software maintenance events for GPU and TPU workloads on GKE. Use when diagnosing node disruptions, predicting host maintenance events on GPU/TPU nodepools, inspecting node interruption PromQL metrics, auditing node taints, or configuring workload protection strategies (graceful termination, opportunistic maintenance, PodDisruptionBudgets). Don't use for general GKE cluster creation, network policy configuration, or non-disruption workload deployment.
한국어 요약은 준비 중입니다. 원문 설명을 표시하고 있습니다.
General electrical engineering support for hardware design and review. Load the canonical Circuit Weaver skill from `skills/ee/SKILL.md`.
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Use this skill when designing, generating an MVP blueprint for, auditing, troubleshooting, refactoring, or explaining an agentic harness for any domain. Covers provider-neutral agent architecture for OpenAI, Anthropic, and OpenAI-compatible APIs: agent loops, tool design, record provenance, interactive presentation, user-memory lifecycles, environment-adaptive tools, speculative tool execution, late-bound capabilities, permissions, system prompts, planning, goals, always-on agents and durable runtime, adaptive agent teams, context compaction, memory, skills, MCP/external connectors, public-board communications, realtime voice agents, hardware agents and board deployment, self-refining recursive harnesses, programmable context, continual refinement, observability, evals, prompt caching, agent-legible environments, feedback loops, and safety.
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This skill should be used when the user gives a SaaS product's landing page URL, homepage, or name and asks for a full teardown or deep-dive of how the product works across web, desktop, and mobile — including per-platform feature inventories and user journeys, tech stack, pricing/plan mapping, how the platforms integrate and sync (and the business logic behind those choices), hardware integrations, business-scale/revenue signals, and concrete release artifacts per platform — with a structured Markdown report as the deliverable. Trigger on phrases like "research this SaaS", "do a platform teardown of X", "map every feature of this product across web/mobile/desktop", "reverse-engineer how this app works everywhere", or a bare URL plus a request to understand the whole product.
한국어 요약은 준비 중입니다. 원문 설명을 표시하고 있습니다.
Semantic Design System Skill for Google Stitch. Generates agent-friendly DESIGN.md files that enforce premium, anti-generic UI standards — strict typography, calibrated color, asymmetric layouts, perpetual micro-motion, and hardware-accelerated performance.
한국어 요약은 준비 중입니다. 원문 설명을 표시하고 있습니다.
Make a web app feel native on a phone — the small CSS and meta-tag fixes that separate "a website in a browser" from something that feels installed. Covers sticky hover states, tap highlight flashes, the 100vh bug, inputs that zoom the page, laggy taps, pull-to-refresh hijacking scroll, content under the notch, long-press selecting button text, carousels that scroll the wrong way, mismatched status bars, and the rule that you test on real hardware. Use when a web app is being built for or reviewed on mobile, when something "works in Chrome but feels wrong on my phone", when building a PWA, a bottom sheet, a carousel, a full-screen layout, or any touch interaction. For motion itself use animate; for React Native use animate-expo.
한국어 요약은 준비 중입니다. 원문 설명을 표시하고 있습니다.
Network-wide ad and tracker blocking at the DNS level. A Pi-hole alternative that runs directly on your machine as an OpenClaw skill. No separate hardware needed.
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Use cheap, TEE-verified AI models from the 0G Compute Network as OpenClaw providers. Discover available models and compare pricing vs OpenRouter, verify provider integrity via hardware attestation (Intel TDX), manage your 0G wallet and sub-accounts, and configure models in OpenClaw with one workflow. Supports DeepSeek, GLM-5, Qwen, and other models available on the 0G marketplace.
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Safely auto-detect the current machine's hardware (GPU, VRAM, system RAM, OS) with read-only commands, then recommend the top 3 local AI models to run — most powerful that fits, best for coding, and best small-and-fast — each with download links. Use when someone asks "what AI models can my computer run" or "what's the best local model for my rig".
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Monitor reviewed Grafana telemetry and freshness evidence for IoT devices and edge fleets. Use for smart devices, home automation sensors, remote equipment, wind turbines, space hardware, device-fleet freshness, missing telemetry, and bounded edge-health comparisons.
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Document-driven workflow for implementing, reviewing, and verifying Chisel processor and memory-subsystem RTL. Use when Codex must work from maintained Architecture and Design, trace a complete integration surface, reason in synthesized-hardware terms, keep source-adjacent _codex.md summaries current, avoid redundant or overprotective logic, or run focused functional verification.
한국어 요약은 준비 중입니다. 원문 설명을 표시하고 있습니다.
Develop, challenge, and document Chisel processor microarchitecture designs before implementation. Use when discussing or writing design documents for processor pipelines, queues, issue logic, rename, ROB, LSU, caches, MSHRs, forwarding, wakeup, replay, flush, privilege, exceptions, or other cycle-accurate hardware mechanisms; when converting design conversations into stable Markdown specifications; or when reviewing a proposed Chisel CPU design for correctness, timing, area, verification cost, and cross-document consistency.
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