This skill should be used when the user asks for "ADHD output", "fewer output tokens", "short numbered steps", "limited working memory formatting", or explicitly invokes "adhd-output-style".
日本語の概要は準備中です。原文の説明を表示しています。
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概要と使いどころ
This skill should be used when the user asks for "ADHD output", "fewer output tokens", "short numbered steps", "limited working memory formatting", or explicitly invokes "adhd-output-style".
日本語の概要は準備中です。原文の説明を表示しています。
This skill should be used when the user asks for a "GPT second opinion", wants a "cross-model review", needs to "check a plan before committing", wants another view after repeated failures, or explicitly invokes "codex-advisor".
日本語の概要は準備中です。原文の説明を表示しています。
This skill should be used when user asks to "update PR summary", "update PR description", "rewrite PR body", "refresh PR title and body", or explicitly invokes "update-pr-summary".
日本語の概要は準備中です。原文の説明を表示しています。
This skill should be used when user asks to "commit these changes", "write commit message", "stage and commit", "create a commit", "commit staged files", or explicitly invokes "commit-staged".
日本語の概要は準備中です。原文の説明を表示しています。
This skill should be used when the user asks for a "Fable second opinion", wants to "check a plan before committing", needs another view after repeated failures, or explicitly invokes "fable-advisor".
日本語の概要は準備中です。原文の説明を表示しています。
This skill should be used when user asks to "create a PR", "make a pull request", "open PR for this branch", "submit changes as PR", "push and create PR", or explicitly invokes "create-pr".
日本語の概要は準備中です。原文の説明を表示しています。
This skill should be used when user asks to "address PR comments", "resolve PR feedback", "handle review comments", "fix PR issues", "respond to PR review", or explicitly invokes "resolve-pr-comments".
日本語の概要は準備中です。原文の説明を表示しています。
This skill should be used when user asks to "clean gone branches", "remove deleted local branches", "prune branches removed from remote", or explicitly invokes "clean-gone-branches".
日本語の概要は準備中です。原文の説明を表示しています。
构建、调试与发布 Tauri v2 应用的工程化工作流。覆盖项目初始化(create-tauri-app)、前端与 Rust 命令通信(`#[tauri::command]` + `invoke`)、状态管理、Capabilities 权限建模、插件接入、跨平台构建与问题排查。当用户需求涉及“创建 Tauri 项目”“把 Web 前端接到 Rust 后端”“最小权限配置(fs/http/shell)”“接入 Tauri 官方插件”“执行 tauri dev/build”“排查 Tauri 构建或运行错误”时使用此 skill。
日本語の概要は準備中です。原文の説明を表示しています。
Dielectric substrates, metal conductors, multi-layer stackups, and loss models (FR4, Rogers, Teflon) for RF PCB simulation. TRIGGER: user asks to set up a substrate, define dielectric properties, create a stackup, select a PCB material (FR4, Rogers, Teflon, etc.), or configure metal conductors. Invoke BEFORE writing dielectric() or metal() code — the API for named vs custom materials differs significantly. SKIP: PCB layout assembly (use matlab-assemble-pcb-layout), transmission line design (use matlab-design-pcb-transmission-line), EM analysis (use matlab-analyze-em), importing a PCB file (use matlab-read-pcb-layout).
日本語の概要は準備中です。原文の説明を表示しています。
Import Gerber, ODB++, Allegro .brd, .mcm files for PCB boards and IC packages. Inspect nets, layers, shapes, and stackups. TRIGGER: user asks to import, read, or open a PCB layout file. Gerber files use gerberRead or PCBReader; ODB++, Allegro .brd, .mcm, and native formats use pcbFileRead. Also when inspecting nets, layers, components, or stackups from an imported board. Invoke BEFORE writing import code — the query API (cadnet, cadnetList, componentList) is specialized. SKIP: EM analysis or S-parameter extraction (use matlab-analyze-em), PDN/IR-drop analysis (use matlab-analyze-pcb-pdn), building custom geometry (use matlab-assemble-pcb-layout), material/stackup definition only (use matlab-manage-pcb-material).
日本語の概要は準備中です。原文の説明を表示しています。
Microstrip, stripline, CPW, differential pairs, and crosstalk analysis for impedance-controlled PCB interconnects. TRIGGER: user asks to design or analyze a transmission line (microstrip, stripline, CPW, coplanar, differential pair), extract RLGC or per-unit-length parameters, compute trace impedance, analyze a PCB trace cross-section, or perform crosstalk/coupling analysis. Invoke BEFORE writing code — preferred over RF Toolbox analytical functions (txlineMicrostrip, txlineStripline, txlineCPW). SKIP: EM simulation/S-parameter extraction of an existing component (use matlab-analyze-em), material/stackup definition only (use matlab-manage-pcb-material), building custom non-catalog geometry (use matlab-assemble-pcb-layout), optimization sweeps (use matlab-optimize-pcb-design).
日本語の概要は準備中です。原文の説明を表示しています。
Export pcbComponent designs to Gerber files with RF connectors and fab service formatting for PCB manufacturing. TRIGGER: user asks to export a PCB design to Gerber, generate manufacturing files, or write out a pcbComponent for fabrication. Invoke BEFORE writing export code — gerberWrite signature (pcbComponent, connectors, filename) is non-obvious. SKIP: importing/reading PCB files (use matlab-read-pcb-layout), building PCB geometry (use matlab-assemble-pcb-layout), EM analysis (use matlab-analyze-em), material/stackup setup (use matlab-manage-pcb-material).
日本語の概要は準備中です。原文の説明を表示しています。
Via modeling: pads, antipads, ground return vias, GRV placement, and signal integrity for high-speed layer transitions. TRIGGER: user asks to model a via, design a via transition, place ground return vias, analyze via performance, or check signal integrity through layer transitions. Invoke BEFORE writing code — only viaSingleEnded exists (no viaDifferential), and the location format is non-obvious. SKIP: general signal integrity without vias (use matlab-analyze-em), transmission line design (use matlab-design-pcb-transmission-line), PDN analysis (use matlab-analyze-pcb-pdn), material/stackup setup only (use matlab-manage-pcb-material).
日本語の概要は準備中です。原文の説明を表示しています。
Spiral inductors, interdigital capacitors, baluns, resonators, phase shifters for impedance matching, DC blocking, and bias tees. TRIGGER: user asks to design or create a spiral inductor, interdigital capacitor, balun, resonator, phase shifter, or other passive RF component. Invoke BEFORE writing code — class names and property patterns are non-obvious. SKIP: filter design (use matlab-design-pcb-filter), coupler/splitter design (use matlab-design-pcb-coupler), transmission line design (use matlab-design-pcb-transmission-line), EM analysis (use matlab-analyze-em), material setup only (use matlab-manage-pcb-material).
日本語の概要は準備中です。原文の説明を表示しています。
Optimize RF PCB dimensions for bandwidth, return loss, or area via patternsearch and surrogateopt with constraints. TRIGGER: user asks to optimize an RF PCB component for performance (bandwidth, return loss, insertion loss, area) or apply constraints to a design. Invoke BEFORE writing optimization code — RF PCB Toolbox has a built-in optimize() function that differs from generic fmincon/ga approaches. SKIP: designing a component from scratch without an optimization objective (use the specific matlab-design-pcb-* skill), EM analysis without optimization (use matlab-analyze-em), material/stackup setup only (use matlab-manage-pcb-material).
日本語の概要は準備中です。原文の説明を表示しています。
Bandpass, lowpass, bandstop filter design — hairpin, coupled-line, combline, stub, SIW for frequency selection and harmonic rejection. TRIGGER: user asks to design, create, or analyze any RF filter (bandpass, lowpass, highpass, bandstop, hairpin, coupled-line, combline, stub, SIW). Invoke BEFORE writing code — filter class names differ from what you would guess. SKIP: EM simulation/S-parameter extraction of an existing filter (use matlab-analyze-em), general PCB layout assembly (use matlab-assemble-pcb-layout), material/stackup setup only (use matlab-manage-pcb-material), optimization sweeps (use matlab-optimize-pcb-design).
日本語の概要は準備中です。原文の説明を表示しています。
Cascade PCB components, add lumped elements, export Touchstone, and bridge to eye diagram or antenna array workflows. TRIGGER: user asks to cascade or connect multiple RF PCB components, add lumped R/L/C, export S-parameters to Touchstone, or combine PCB elements into a circuit. Invoke BEFORE writing pcbcascade or circuit code — cascade rules and port matching are non-obvious. SKIP: designing individual components (use the specific matlab-design-pcb-* skill), EM analysis of a single component (use matlab-analyze-em), material/stackup setup only (use matlab-manage-pcb-material), optimization (use matlab-optimize-pcb-design).
日本語の概要は準備中です。原文の説明を表示しています。
Wilkinson, branchline, ratrace, directional couplers, corporate dividers, Rotman lenses for power splitting and beam-forming. TRIGGER: user asks to design, create, or analyze any coupler, splitter, power divider, combiner, or Rotman lens. Invoke BEFORE writing code — class names and design() availability vary per coupler type. SKIP: EM simulation/S-parameter extraction of an existing component (use matlab-analyze-em), building custom non-catalog geometry (use matlab-assemble-pcb-layout), material/stackup setup only (use matlab-manage-pcb-material), cascading multiple components (use matlab-integrate-pcb-circuit).
日本語の概要は準備中です。原文の説明を表示しています。
Build custom PCB structures with pcbComponent, shapes, Boolean ops, feeds, and multi-layer stackups for non-catalog geometries. TRIGGER: user asks to build, modify, or customize a pcbComponent — add/remove shapes, edit polygons, place feeds, add metal layers, cut slots, or create non-catalog RF structures. Also when modifying geometry of an existing catalog-designed component (e.g., adding pads, removing elements, editing vertices). Invoke BEFORE writing pcbComponent code — layer/shape/feed API is non-obvious. SKIP: designing catalog components like filters/couplers/txlines (use the specific matlab-design-pcb-* skill), material/stackup definition only (use matlab-manage-pcb-material), EM analysis (use matlab-analyze-em), importing PCB files (use matlab-read-pcb-layout).
日本語の概要は準備中です。原文の説明を表示しています。
PDN DC voltage/current analysis, IR drop, design rule checking, and multi-net batch analysis on imported PCB layouts. TRIGGER: user asks about power integrity, PDN analysis, IR drop, voltage distribution, current density, power nets, or design rule checking on a PCB. Invoke BEFORE writing code — the PDN API chain is specialized and non-obvious. SKIP: importing a PCB file (use matlab-read-pcb-layout), EM field/S-parameter extraction (use matlab-analyze-em), material/stackup setup only (use matlab-manage-pcb-material), transmission line design (use matlab-design-pcb-transmission-line).
日本語の概要は準備中です。原文の説明を表示しています。
S-parameters, insertion loss, fields, currents, mesh control, and solver selection for RF PCB performance validation. TRIGGER: user asks to compute S-parameters, analyze insertion/return loss, extract fields or currents, compare MoM vs FEM, or control mesh for any RF PCB component. Invoke BEFORE writing sparameters() or solver code — API is non-obvious. SKIP: designing or creating components (use the specific matlab-design-pcb-* skill), material/stackup setup only (use matlab-manage-pcb-material), optimization sweeps (use matlab-optimize-pcb-design), PDN/IR-drop analysis (use matlab-analyze-pcb-pdn).
日本語の概要は準備中です。原文の説明を表示しています。
Fit curves and surfaces interactively with the Curve Fitter app for a complete no-code fitting workflow. Invoke this skill when the Curve Fitter app, cftool, curveFitter, or "curve fitting tool/app" is mentioned in any way. Also use when exploring or comparing fit types (regression, interpolation, smoothing, splines, custom equations); excluding outliers interactively; iterating on a fitting workflow; help choosing a fit type; and exporting to a figure, generating MATLAB code, fits to the workspace, and to Simulink Lookup Tables.
日本語の概要は準備中です。原文の説明を表示しています。
Generate C/C++ or CUDA code from an AI model (PyTorch, LiteRT) using MATLAB Coder or GPU Coder. Use when the user wants to integrate an AI model into an application with code generation as the end goal — generating MEX, CUDA MEX, static library, dynamic library, or executable — or using the model in Simulink for simulation and code generation. Covers PyTorch ExportedProgram (.pt2) via loadPyTorchExportedProgram and LiteRT (.tflite) via loadLiteRTModel (R2026a+). Keywords: PyTorch, torch, .pt2, ExportedProgram, loadPyTorchExportedProgram, invoke, codegen, MEX, CUDA, GPU, C, C++, deploy, AI model, deep learning model, LiteRT, TFLite, TensorFlow Lite, Simulink, slbuild, PyTorch ExportedProgram block, MATLAB Function block, dlosslib, loadLiteRTModel.
日本語の概要は準備中です。原文の説明を表示しています。