「design」の検索結果

デザインデータ（Figma などのデザインカンプ）を参照してコーディングするときの解釈原則とアセットの扱い。Figma の URL・MCP・デザイン画像・カンプをもとに実装や修正をするときに必ず使う。

Type design analysis — encapsulation, invariant expression, usefulness, and enforcement.

日本語の概要は準備中です。原文の説明を表示しています。

Execute the implementation planning workflow using the plan template to generate design artifacts.

日本語の概要は準備中です。原文の説明を表示しています。

Convert existing tasks into actionable, dependency-ordered GitHub issues for the feature based on available design artifacts.

日本語の概要は準備中です。原文の説明を表示しています。

Generate an actionable, dependency-ordered tasks.md for the feature based on available design artifacts.

日本語の概要は準備中です。原文の説明を表示しています。

Analyze existing KiCad projects, schematics, PCB layouts, Gerbers, netlists, and PDF reference schematics. Use when files such as .kicad_sch, .kicad_pcb, .kicad_pro, or Gerbers are supplied and the user wants review, debugging, net tracing, ERC/DRC/DFM, schematic-to-PCB comparison, or pre-fabrication checks. Do not use to create a new design from requirements or for standalone sourcing and ordering.

日本語の概要は準備中です。原文の説明を表示しています。

Design and verify professional multi-sheet KiCad hierarchies generated from Circuit Weaver functional sections. Use when adding, splitting, renaming, or reviewing schematic sheets, cross-sheet interfaces, root symbols, sheet ownership, or final hierarchy ERC.

日本語の概要は準備中です。原文の説明を表示しています。

General electrical engineering support for hardware design and review. Load the canonical Circuit Weaver skill from `skills/ee/SKILL.md`.

日本語の概要は準備中です。原文の説明を表示しています。

PCBWay PCB fabrication and assembly — turnkey/consigned assembly, design rules, ordering workflow. Alternative to JLCPCB for manufacturing. Use with KiCad. Use this skill when the user mentions PCBWay, needs turnkey assembly (PCBWay sources parts by MPN), has parts not available on LCSC, needs assembled boards with non-LCSC components, wants to compare PCBWay vs JLCPCB, or needs assembly with parts sourced globally rather than from LCSC only. For gerber/CPL export, stencil ordering, and BOM management, see the `bom` skill.

日本語の概要は準備中です。原文の説明を表示しています。

Manage an electronics bill of materials across distributors and fabricators: part selection, stock, pricing, alternates, ordering, KiCad properties, and BOM/CPL export. Use for distributor-neutral sourcing, cost comparison, order preparation, or requests such as "what parts do I need" and "export for JLCPCB". Do not take over schematic analysis or a complete new-design workflow unless the requested task is specifically its sourcing/manufacturing stage.

日本語の概要は準備中です。原文の説明を表示しています。

Evidence-first academic research workflow for topic ideation, scholarly search, paper reading, literature and systematic reviews, study and experiment design, statistics and data analysis, scientific figures, manuscript drafting and polishing, citation checks, peer review, rebuttals, submission packages, theses, and paper-to-presentation work. Use when an agent must plan, execute, audit, write, revise, or package research while keeping claims traceable to verified sources, data, analysis, or official requirements.

日本語の概要は準備中です。原文の説明を表示しています。

Build a HyperFrames video composition from a brief/script autonomously. Uses separated builder and critic subagents — builders never review their own work. Quality decisions are grounded in project context (identity, audience, goals) and established visual/motion design principles. Measurable criteria (text size, contrast, overflow) are verified with tooling, not visual judgment. Use when the user says "make this video", "implement this brief", "build this composition", or provides a video script/brief to implement.

日本語の概要は準備中です。原文の説明を表示しています。

Firmware development for the LGT8F328P-LQFP32 MiniEVB — the Nano-style 30-pin "purple nano" board whose silkscreen reads LGTBF32BP (also sold as BTE21-15A, WAVGAT, LGT8F328P Nano V3.0), built on the Logic Green / Prodesign LGT8F328P, an AVR-instruction-compatible LGT8XM part with a 32 MHz internal RC and no crystal, a 12-bit ADC, an 8-bit DAC on D4, four timers, 80 mA drive pins, SWD instead of ICSP, and EEPROM emulated in program flash. Use when working on this board, any LGT8F328P/LGT8F328D/LGT8FX8P board, or a sketch being ported from an Arduino Nano or ATmega328P: PlatformIO setup with the lgt8fx core, platformio.ini, f_cpu/f_osc/clock_source and why timings come out 2x wrong, pin mapping and the LQFP32 bonded pads, analogRead resolution and reference errors, analogWrite hitting the DAC, EEPROM vanishing after upload, 80 mA outputs, upload failures over CH340/CH9340/HT42B534, SWD recovery, or debugging why something on the board does not work.

日本語の概要は準備中です。原文の説明を表示しています。

Generate Excalidraw architecture diagrams (.excalidraw JSON files) from your codebase. Triggers: you need whiteboard-style sketches that read as a thinking artifact rather than a polished spec — ideal for design.

日本語の概要は準備中です。原文の説明を表示しています。

Review then build — chains architecture review into implementation. Accepts any spec format (ticket, PRD, engineering spec, feature description, screenshot) and autonomously reviews the design, resolves gaps, then implements with tests and a PR.

日本語の概要は準備中です。原文の説明を表示しています。

Generates structured engineering specs (backend or frontend) from feature descriptions, designs, or ticket references. Triggers on "spec", "story", "ticket", "engineering spec", "write a story for", "write a spec for", "create a ticket for".

日本語の概要は準備中です。原文の説明を表示しています。

Audit warehouse flow design and material movement -- evaluate pick path optimization algorithms, ABC velocity-based slotting compliance, zone configuration and boundary balancing, conveyor merge point and sortation system capacity, wave planning logic.

日本語の概要は準備中です。原文の説明を表示しています。

Audit game narrative systems for technical quality -- branching dialogue trees, state/flag tracking, quest systems, choice-consequence mapping, localization pipelines, voice-over integration, and cinematic scripting..

日本語の概要は準備中です。原文の説明を表示しています。

Audit mobile app revenue implementation -- in-app purchases, subscriptions, ad SDKs, paywall design, trial conversion funnels, and store billing compliance. Triggers: reviewing IAP flows, optimizing subscription conversion, checking ad mediation setup.

日本語の概要は準備中です。原文の説明を表示しています。

Analyzes SIEM alert pipelines for rule optimization, alert fatigue reduction, criticality scoring, asset-based prioritization, and correlation rule design using NIST CSF and detection engineering principles..

日本語の概要は準備中です。原文の説明を表示しています。

Design CNC-ready modular, interlocking, flat-pack furniture and functional objects from sheet materials (plywood, MDF, acrylic) with slot/tab joinery, precise tolerances, full parts lists, cut layouts, assembly instructions, and CAD export guidance — no fasteners required.

日本語の概要は準備中です。原文の説明を表示しています。

Audit curriculum management software for learning outcome alignment, pacing guide optimization, standards coverage mapping (Common Core, NGSS, state standards), differentiation support, assessment design quality, and content gap detection across grade levels and subjects..

日本語の概要は準備中です。原文の説明を表示しています。

Build a structured interview scorecard for a role. Use when the user says "create an interview scorecard", "build an interview guide", "what questions should I ask for this role", "help me evaluate candidates consistently", "design the interview process", or wants to assess candidates against defined criteria - even if they don't explicitly say "scorecard". Also use when a recruiter or hiring manager wants to prevent gut-feel hiring.

日本語の概要は準備中です。原文の説明を表示しています。

Write a threat model document. Use when the user says "threat model", "threat modeling", "STRIDE analysis", "attack surface analysis", "security design review", "what are the threats to this system", "adversarial analysis", "identify threats", "security threat assessment", or needs to systematically identify and document threats to a system or feature - even if they don't explicitly say "threat model".

日本語の概要は準備中です。原文の説明を表示しています。