「esi」の検索結果

Test coverage quality analysis — behavioral coverage, critical gap identification, test resilience evaluation.

日本語の概要は準備中です。原文の説明を表示しています。

Design and verify professional multi-sheet KiCad hierarchies generated from Circuit Weaver functional sections. Use when adding, splitting, renaming, or reviewing schematic sheets, cross-sheet interfaces, root symbols, sheet ownership, or final hierarchy ERC.

日本語の概要は準備中です。原文の説明を表示しています。

PCBWay PCB fabrication and assembly — turnkey/consigned assembly, design rules, ordering workflow. Alternative to JLCPCB for manufacturing. Use with KiCad. Use this skill when the user mentions PCBWay, needs turnkey assembly (PCBWay sources parts by MPN), has parts not available on LCSC, needs assembled boards with non-LCSC components, wants to compare PCBWay vs JLCPCB, or needs assembly with parts sourced globally rather than from LCSC only. For gerber/CPL export, stencil ordering, and BOM management, see the `bom` skill.

日本語の概要は準備中です。原文の説明を表示しています。

Manage an electronics bill of materials across distributors and fabricators: part selection, stock, pricing, alternates, ordering, KiCad properties, and BOM/CPL export. Use for distributor-neutral sourcing, cost comparison, order preparation, or requests such as "what parts do I need" and "export for JLCPCB". Do not take over schematic analysis or a complete new-design workflow unless the requested task is specifically its sourcing/manufacturing stage.

日本語の概要は準備中です。原文の説明を表示しています。

General electrical engineering support for hardware design and review. Load the canonical Circuit Weaver skill from `skills/ee/SKILL.md`.

日本語の概要は準備中です。原文の説明を表示しています。

Analyze existing KiCad projects, schematics, PCB layouts, Gerbers, netlists, and PDF reference schematics. Use when files such as .kicad_sch, .kicad_pcb, .kicad_pro, or Gerbers are supplied and the user wants review, debugging, net tracing, ERC/DRC/DFM, schematic-to-PCB comparison, or pre-fabrication checks. Do not use to create a new design from requirements or for standalone sourcing and ordering.

日本語の概要は準備中です。原文の説明を表示しています。

Catalog-then-fix slop removal on an existing prose draft. Parallel catalog subagents inventory four slop categories (theatrics, overwrought register, corrective antithesis, dramatic short sentences), fix subagents repair only what a catalog names, mechanical lint + frequency analysis bracket the run, and a regression gate (lint delta, word count, cold meaning check) decides whether the result ships. Use when the user says "deslop this draft", "catalog deslop", "strip the AI patterns from this file", or as the final stage of the article-factory and mosaic-writing skills. For writing or redrafting prose from scratch, use the prose skill instead - this skill only repairs an existing draft in place.

日本語の概要は準備中です。原文の説明を表示しています。

Build a HyperFrames video composition from a brief/script autonomously. Uses separated builder and critic subagents — builders never review their own work. Quality decisions are grounded in project context (identity, audience, goals) and established visual/motion design principles. Measurable criteria (text size, contrast, overflow) are verified with tooling, not visual judgment. Use when the user says "make this video", "implement this brief", "build this composition", or provides a video script/brief to implement.

日本語の概要は準備中です。原文の説明を表示しています。

Firmware development for the LGT8F328P-LQFP32 MiniEVB — the Nano-style 30-pin "purple nano" board whose silkscreen reads LGTBF32BP (also sold as BTE21-15A, WAVGAT, LGT8F328P Nano V3.0), built on the Logic Green / Prodesign LGT8F328P, an AVR-instruction-compatible LGT8XM part with a 32 MHz internal RC and no crystal, a 12-bit ADC, an 8-bit DAC on D4, four timers, 80 mA drive pins, SWD instead of ICSP, and EEPROM emulated in program flash. Use when working on this board, any LGT8F328P/LGT8F328D/LGT8FX8P board, or a sketch being ported from an Arduino Nano or ATmega328P: PlatformIO setup with the lgt8fx core, platformio.ini, f_cpu/f_osc/clock_source and why timings come out 2x wrong, pin mapping and the LQFP32 bonded pads, analogRead resolution and reference errors, analogWrite hitting the DAC, EEPROM vanishing after upload, 80 mA outputs, upload failures over CH340/CH9340/HT42B534, SWD recovery, or debugging why something on the board does not work.

日本語の概要は準備中です。原文の説明を表示しています。

Compiles binary analysis findings into structured reports — correlates facts from triage, static, and dynamic phases, validates hypotheses against evidence, and produces traceable documentation. Use when ready to summarize findings, generate a report, document what a binary does, or prepare results for handoff or archival.

日本語の概要は準備中です。原文の説明を表示しています。

Analyzes ELF binaries, executables, and firmware images to understand behavior without source code; coordinates sub-skills binary-re:triage, binary-re:static-analysis, binary-re:dynamic-analysis, binary-re:synthesis, and binary-re:tool-setup. Use when working with a binary, executable, or ELF file; asked to reverse engineer, disassemble, decompile, or figure out what something does; targeting ARM64, ARMv7, x86_64, or MIPS; or analyzing Python bytecode (.pyc, marshal). For Python bytecode analysis, see docs/python-bytecode-re.md.

日本語の概要は準備中です。原文の説明を表示しています。

Microservices design expert covering service decomposition, communication patterns, and distributed systems

日本語の概要は準備中です。原文の説明を表示しています。

Database expert for query optimization, indexing, schema design, and performance tuning

日本語の概要は準備中です。原文の説明を表示しています。

Scholar of medieval philosophy covering Aquinas, Scotus, Ockham, and the synthesis of Aristotelian philosophy with Christian theology

日本語の概要は準備中です。原文の説明を表示しています。

Scholar of biblical interpretation covering Hebrew Bible and New Testament with historical-critical and literary methods

日本語の概要は準備中です。原文の説明を表示しています。

Expert in complex functions, contour integration, residue theory, and conformal mappings

日本語の概要は準備中です。原文の説明を表示しています。

Generates structured engineering specs (backend or frontend) from feature descriptions, designs, or ticket references. Triggers on "spec", "story", "ticket", "engineering spec", "write a story for", "write a spec for", "create a ticket for".

日本語の概要は準備中です。原文の説明を表示しています。

Generate Excalidraw architecture diagrams (.excalidraw JSON files) from your codebase. Triggers: you need whiteboard-style sketches that read as a thinking artifact rather than a polished spec — ideal for design.

日本語の概要は準備中です。原文の説明を表示しています。

Review then build — chains architecture review into implementation. Accepts any spec format (ticket, PRD, engineering spec, feature description, screenshot) and autonomously reviews the design, resolves gaps, then implements with tests and a PR.

日本語の概要は準備中です。原文の説明を表示しています。

Run a full retrospective and dev cycle analysis. Chains /recall → /new-features to reconstruct what went wrong, extract lessons learned, identify rework patterns, and synthesize feature ideas from the findings. Triggers: retrospective, retro, dev cycle analysis, what went wrong, lessons learned, postmortem, sprint retro.

日本語の概要は準備中です。原文の説明を表示しています。

Assess supply chain risk exposure and resilience posture. Analyzes supplier dependency mapping (Tier 1/2/3), geographic concentration risk, single-source vulnerability, disruption scenario modeling (pandemic, trade war, port closure), Monte Carlo simulation.

日本語の概要は準備中です。原文の説明を表示しています。

Audit warehouse flow design and material movement -- evaluate pick path optimization algorithms, ABC velocity-based slotting compliance, zone configuration and boundary balancing, conveyor merge point and sortation system capacity, wave planning logic.

日本語の概要は準備中です。原文の説明を表示しています。

Analyze a residential rental property as an investment — 1-4 unit single-family / duplex / triplex / quadplex, condo, townhome. Triggers: "rental analysis", "rental underwriting", "cap rate calculator", "BRRRR", "DSCR loan".

日本語の概要は準備中です。原文の説明を表示しています。

Audit whether a product is ready for enterprise sales. Use when you need to assess SSO/SAML/SCIM support, RBAC maturity, multi-tenancy data isolation, audit logging coverage, public API quality, SLA operational readiness, SOC2/ISO27001 certification gaps, GDPR data residency controls.

日本語の概要は準備中です。原文の説明を表示しています。