设计技能

General electrical engineering support for hardware design and review. Load the canonical Circuit Weaver skill from `skills/ee/SKILL.md`.

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Use only for an explicitly requested step-by-step Circuit Weaver questionnaire. Load the canonical workflow from skills/design-wizard/SKILL.md; use circuit-weaver for ordinary automatic new-design requests.

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Create, import, analyze, resume, or revise an end-to-end Circuit Weaver electronic design from requirements through validated functional KiCad schematics, placement review, and a truthful manufacturing handoff. Use for new designs and for existing KiCad/PCB/Gerber projects that need durable state. Use kicad for one-off file inspection, bom for standalone sourcing, and design-wizard only when the user explicitly requests the slower questionnaire.

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Xilinx/AMD Vivado FPGA build workflow -- batch-mode TCL scripting, ADI HDL reference design integration, Zynq-7000/MPSoC block design, IP builds, synthesis, implementation, and bitstream generation. Use for any Zynq or UltraScale+ design that incorporates ADI transceivers or follows the ADI HDL reference design pattern.

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Create, import, analyze, or resume an end-to-end Circuit Weaver electronic design with durable project state. Load the canonical workflow from skills/circuit-weaver/SKILL.md. Use kicad for one-off file inspection, bom for sourcing, and design-wizard only when explicitly requested.

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Design and verify professional multi-sheet KiCad hierarchies generated from Circuit Weaver functional sections. Use when adding, splitting, renaming, or reviewing schematic sheets, cross-sheet interfaces, root symbols, sheet ownership, or final hierarchy ERC.

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Generate KiCad schematics from a Circuit Weaver design.yaml or a project's own checked-in generator. Use for large, repetitive, or machine-synchronized designs. Prefer the Circuit Weaver CLI unless the project actually contains and documents its own generation scripts.

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PCBWay PCB fabrication and assembly — turnkey/consigned assembly, design rules, ordering workflow. Alternative to JLCPCB for manufacturing. Use with KiCad. Use this skill when the user mentions PCBWay, needs turnkey assembly (PCBWay sources parts by MPN), has parts not available on LCSC, needs assembled boards with non-LCSC components, wants to compare PCBWay vs JLCPCB, or needs assembly with parts sourced globally rather than from LCSC only. For gerber/CPL export, stencil ordering, and BOM management, see the `bom` skill.

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Analyze existing KiCad projects, schematics, PCB layouts, Gerbers, netlists, and PDF reference schematics. Use when files such as .kicad_sch, .kicad_pcb, .kicad_pro, or Gerbers are supplied and the user wants review, debugging, net tracing, ERC/DRC/DFM, schematic-to-PCB comparison, or pre-fabrication checks. Do not use to create a new design from requirements or for standalone sourcing and ordering.

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Run the explicit, human-in-the-loop Circuit Weaver questionnaire from requirements through a validated design and KiCad handoff. Use only when the user asks for the design-wizard skill, the offline interactive wizard, or a slow step-by-step guided questionnaire. Do not trigger for ordinary new-design requests; use circuit-weaver for automatic end-to-end orchestration.

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Manage an electronics bill of materials across distributors and fabricators: part selection, stock, pricing, alternates, ordering, KiCad properties, and BOM/CPL export. Use for distributor-neutral sourcing, cost comparison, order preparation, or requests such as "what parts do I need" and "export for JLCPCB". Do not take over schematic analysis or a complete new-design workflow unless the requested task is specifically its sourcing/manufacturing stage.

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Improve an existing agent SKILL.md through one gated cycle: select the target (default this skill), snapshot the committed baseline, diagnose against skill-design-principles plus four rubric dimensions, apply exactly one focused change, and ship only if a different agent than the author PASSes with quoted evidence. Use when the user says "improve this skill", "improve-skill", "iterate on SKILL.md", or "apply skill-design-principles to a skill". Do not use for code slop over a duration (anneal), generic timeboxed work (timeboxed-iterating), graph orchestration (workgraph), metric hill-climb on a codebase (autoresearch), or stripping slop from existing prose (catalog-deslop).

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Firmware development for the LGT8F328P-LQFP32 MiniEVB — the Nano-style 30-pin "purple nano" board whose silkscreen reads LGTBF32BP (also sold as BTE21-15A, WAVGAT, LGT8F328P Nano V3.0), built on the Logic Green / Prodesign LGT8F328P, an AVR-instruction-compatible LGT8XM part with a 32 MHz internal RC and no crystal, a 12-bit ADC, an 8-bit DAC on D4, four timers, 80 mA drive pins, SWD instead of ICSP, and EEPROM emulated in program flash. Use when working on this board, any LGT8F328P/LGT8F328D/LGT8FX8P board, or a sketch being ported from an Arduino Nano or ATmega328P: PlatformIO setup with the lgt8fx core, platformio.ini, f_cpu/f_osc/clock_source and why timings come out 2x wrong, pin mapping and the LQFP32 bonded pads, analogRead resolution and reference errors, analogWrite hitting the DAC, EEPROM vanishing after upload, 80 mA outputs, upload failures over CH340/CH9340/HT42B534, SWD recovery, or debugging why something on the board does not work.

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Apply or audit the approved Quiet Signal core visual language when the user explicitly asks for Quiet Signal styling on a defined website, interface, poster, social graphic, report, presentation, or other design artifact. This skill supplies visual identity and rule checks; it does not plan content, invent platform requirements, or run a production pipeline.

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Plan or review software architecture through a small expert panel. Use when the user explicitly asks for architecture planning, system design, technical strategy, an architecture assessment, a design review, or a system health review. Do not use for ordinary PR review, debugging, or implementation.

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Microservices design expert covering service decomposition, communication patterns, and distributed systems

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RESTful and GraphQL API design expert covering best practices, security, and scalability

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Presentation specialist for slide design, visual storytelling, data visualization, and compelling public speaking techniques

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Graphic design expert covering typography, color theory, layout, and visual communication

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User experience and interface design expert for wireframing, user research, and design systems

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Full design improvement pipeline — syncs your app to Google Stitch, generates alternatives, presents side-by-side comparison, and adopts cherry-picked improvements. Triggers: 'stitch pipeline', 'improve my design with stitch', 'make my app look better', 'stitch redesign everything'.

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Generate Excalidraw architecture diagrams (.excalidraw JSON files) from your codebase. Triggers: you need whiteboard-style sketches that read as a thinking artifact rather than a polished spec — ideal for design.

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Full autonomous design pipeline — builds fast, then the safety net polishes it. Chains: design-setup → design-build → (design-audit ∥ design-optimize) → design-polish → design-animate. Ships production-grade interfaces end to end.

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Complete autonomous design overhaul — tears down dated patterns and rebuilds with modern CSS, proper tokens, purposeful motion, and production-grade quality. The nuclear option for ugly interfaces.

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