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Automatically infer formal correctness properties from Verilog/SystemVerilog RTL code and generate SystemVerilog Assertions (SVA). Identifies control-flow invariants (mutual exclusion, valid-ready handshakes, pipeline ordering, safety properties), liveness expectations, and temporal properties. Use when working with RTL designs that need formal property generation, when adding assertions to existing RTL, or when users ask to infer properties, generate assertions, or create formal specifications from hardware designs.

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Hardware verification tool for checking functional equivalence between two RTL designs (Verilog). Use when users need to: (1) Verify if two RTL versions are functionally equivalent, (2) Compare original vs. refactored RTL code, (3) Validate design changes or optimizations, (4) Identify semantic vs. cosmetic differences, (5) Generate counterexamples for non-equivalent designs. Analyzes interface alignment, state variables, logic differences, and produces detailed equivalence verdicts with plain language explanations. Particularly effective for design verification, code reviews, and regression testing of RTL modifications.

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Trigger this skill when the user wants to train, fine-tune, or adapt Gemma models (e.g. SFT, DPO, RLHF, Reward Modeling) on local hardware. Covers TRL, Unsloth, dataset preparation, validation, and GGUF/LiteRT conversion.

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ROS 2 engineering: rclcpp/rclpy, colcon/ament, launch, QoS/DDS, tf2/URDF, ros2_control, Nav2, MoveIt 2, sensors, runtime/artifact provenance, and hardware safety. Use for development, review, debugging, and ROS 1 migration to ROS 2. Not for general C++/Python, unrelated middleware, or web/mobile tasks.

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Think and work like an expert Embedded Systems Engineer. Use when a task calls for Embedded Systems Engineer judgment. Reasons from hardware timing, interrupt latency, memory maps, and deterministic WCET resource bounds through DWT CYCCNT and Saleae logic-analyzer timing proofs, SWD/JTAG (J-Link/OpenOCD) with CFSR/HFSR/BFAR fault decode, FreeRTOS/Zephyr respecting configMAX_SYSCALL_INTERRUPT_PRIORITY, MISRA C:2012 and ISO 26262 ASIL discipline, Nordic PPK2 power profiling, and MCUboot signed OTA while treating priority inversion, Cortex-M7 uncached-DMA D-cache incoherence, CAN bus-off, I2C NACK storms, and brownout-during-flash-write NVS corruption as first-class failure modes.

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Select, run, and govern NVIDIA Cosmos world-video generation across Cosmos 3 Generator, Predict2.5, Transfer2.5, downloadable checkpoints, self-hosted NIMs, and hosted preview surfaces. Use for text/image/video-to-world, controlled world transfer, multiview or action-conditioned physical-AI video, local checkpoint pinning, hardware planning, inference approval, and output validation; do not use for Cosmos Reason/Embed-only tasks.

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Generate and operate Tencent Hunyuan video through the managed TokenHub HY-Video-1.5 API or official local HunyuanVideo repositories. Use for text-to-video, image-to-video, hosted job lifecycle, pricing and region planning, local checkpoint selection, hardware and acceleration, prompt design, licensing, safety, provenance, and delivery QA.

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Embedded hardware debugging workflow for probe-rs targets using embedded-debugger-mcp. Use when Codex or Claude Code needs to inspect debug probes, validate embedded debugger setup, start the MCP server, guide a user through ARM Cortex-M/RISC-V flashing/debugging/RTT workflows, or operate without installing an MCP client by using the CLI plus prompts.

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Patterns for embedded software development including real-time systems, memory management, hardware abstraction, interrupt handling, and debugging techniques for resource-constrained environments. Use when ", " mentioned.

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Optimize Ollama configuration for the current machine's hardware. Use when asked to speed up Ollama, tune local LLM performance, or pick models that fit available GPU/RAM. Don't use for LM Studio, llama.cpp, vLLM, or hosted-API LLM providers.

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Applies the reasoning, materials design principles, and research philosophy of Zhenan Bao (chemical engineer, Stanford University, flexible electronics). Use this skill whenever you are advising on hardware innovation, materials science, wearable/implantable technology, bioelectronics, or deep-tech research strategy. Trigger this when users face engineering bottlenecks requiring biological inspiration, trade-offs between mechanical and electronic performance, scaling lab fabrication to commercial manufacturing, or managing long-term academic research and mentorship. Apply her frameworks to shift from reactive problem-solving to proactive, integrated design.

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Applies the reasoning of Pieter Abbeel, robotics and reinforcement learning expert, UC Berkeley professor, and co-founder of Covariant. Use this skill whenever you are designing AI systems, tackling Sim2Real transfer, deploying machine learning in the physical world, or evaluating reinforcement learning architectures. Trigger this skill for questions about domain randomization, reward design, bootstrapping real-world AI, robotics hardware assumptions, or shifting from hard-coded rules to data-driven deep learning. It helps ground theoretical AI in physical embodiment and pragmatic deployment.

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Applies the product philosophy and leadership frameworks of Steve Jobs, co-founder and CEO of Apple Inc. Reach for this skill whenever the user is navigating product design, customer experience, innovation, hiring top-tier talent, or defining corporate culture. Trigger this skill for questions about finding product-market fit, making career trade-offs, building hardware/software ecosystems, or establishing brand values. Use this to push back against feature creep, committee-driven decisions, and technology-first thinking. Apply Jobs's mental models to help users simplify complex systems, focus on craftsmanship, and build products that sit at the intersection of technology and the liberal arts.

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Applies the reasoning, principles, and mental models of Sebastian Thrun (robotics and self-driving cars pioneer, founder of Google X, Waymo, Udacity, Stanford University). Reach for this skill whenever Claude is asked to advise on hardware/software systems engineering, autonomous vehicles, moonshot ideation, probabilistic robotics (SLAM), or leading high-stakes engineering teams. Trigger this skill for discussions on democratizing education, regulating AI, transitioning from academic research to product development, or managing technical teams with empathy. Use it to shift focus from incremental component debates to end-to-end execution and audacious goals.

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Applies the reasoning style of Geoffrey Hinton, deep learning pioneer and 2018 Turing Award winner. Use this skill whenever evaluating AI safety, existential risk, neural network architectures, cognitive science, or tech regulation. Reach for this when the user is discussing LLM capabilities (understanding vs. autocomplete), the biological vs. digital intelligence divide, AI alignment strategies, or the societal/economic impacts of automation. It is highly applicable when dealing with contrarian scientific ideas, hardware/software integration (mortal vs. immortal computing), or global cooperation on technological threats. Do not wait for the user to name Hinton; trigger this skill proactively for any deep learning or AI existential risk analysis.

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This skill applies the first-principles engineering and capital allocation frameworks of Elon Musk (CEO of Tesla and SpaceX, founder of X.com / PayPal). Reach for this skill whenever the user is facing complex manufacturing bottlenecks, evaluating existential risks, debating free speech vs. censorship, dealing with bureaucratic overregulation, or trying to accelerate ambitious technical timelines. It is highly effective for situations involving hardware production, AI symbiosis, radical innovation, and aggressive execution. Use this skill proactively when discussing multi-planetary expansion, government efficiency, or scaling prototypes to mass production, even if the user doesn't explicitly name him.

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Applies the engineering and research philosophies of Jeff Dean, Chief Scientist at Google DeepMind and Google Research. Reach for this skill whenever you are designing large-scale distributed systems, optimizing latency and energy efficiency, or making architectural decisions about machine learning infrastructure. It should trigger automatically for topics involving hardware-ML co-design, model distillation, sparse activation, massively multi-task models, or scaling systems by 5x to 10x. Use this skill to evaluate system bottlenecks, transition from specialized to unified models, and optimize experimental velocity. Apply his mental models to avoid premature 100x scaling and to treat AI models as reasoning engines rather than memorization databases.

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Use this skill whenever reasoning about manufacturing, scaling production, pricing strategies, operational efficiency, vertical integration, or labor compensation. Trigger this skill for situations involving hardware development, supply chain optimization, mass-market economics, or when a founder is deciding between outside investment and bootstrapping. Apply Henry Ford's principles of absolute operational control, continuous manufacturing improvement, and treating efficiency as a service to the consumer. Reach for this whenever a user is building physical products, scaling a business for the 'great multitude', or trying to eliminate operational waste.

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Senior UI/UX Engineer. Architect digital interfaces overriding default LLM biases. Enforces metric-based rules, strict component architecture, hardware-accelerated CSS, and balanced design engineering. By Leon Lin & blueemi. Multi-runtime improved by shokunin.

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Windows 11 system administration with PowerShell — system info reporting, hardware monitoring, package management (winget/scoop), disk cleanup, performance optimization, environment configuration, PowerShell profile setup with aliases and autocomplete, and Task Scheduler automation. Use when user asks to check system info, install tools on Windows, clean up disk space, set up PowerShell profile, or automate Windows tasks. Do NOT use for Linux administration, cross-platform scripting, or network infrastructure management.

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Visual design audit for iOS apps on real hardware. (gstack)

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Bench instruments and measurement techniques for electronics — digital multimeter, oscilloscope, logic analyzer, spectrum analyzer, function generator, power supply, and their proper use. Covers probing technique, ground loops, loading effects, trigger modes, FFT mode pitfalls, signal integrity, noise budget analysis, and debugging workflows from "it doesn't work" to "here is the failure mechanism." Use when measuring, debugging, or characterizing any electronic circuit or firmware-hardware interaction.

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Embedded firmware development for microcontrollers including memory-mapped I/O, GPIO, interrupts, timers, UART/SPI/I2C serial protocols, PWM generation, ADC sampling, interrupt-driven versus polled architectures, RTOS fundamentals, and the bring-up sequence from power-on reset through first printf. Covers AVR/Arduino, ARM Cortex-M, and ESP32 patterns. Use when writing, porting, debugging, or reviewing firmware that directly manipulates hardware peripherals.

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Systems programming from memory management through networking. Covers memory models (stack vs heap, manual allocation, garbage collection, ownership/borrowing), concurrency (threads, mutexes, channels, async/await, actor model, data races vs race conditions), operating system concepts (processes, virtual memory, page tables, system calls, file descriptors, signals), compilation (lexing, parsing, code generation, linking, static vs dynamic libraries), networking fundamentals (TCP/IP, sockets, HTTP, DNS, TLS), and the hardware-software boundary (caches, cache lines, false sharing, memory-mapped I/O). Use when working with low-level code, diagnosing system-level bugs, understanding performance characteristics, or bridging between high-level languages and machine behavior.

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