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Firmware development for the LGT8F328P-LQFP32 MiniEVB — the Nano-style 30-pin "purple nano" board whose silkscreen reads LGTBF32BP (also sold as BTE21-15A, WAVGAT, LGT8F328P Nano V3.0), built on the Logic Green / Prodesign LGT8F328P, an AVR-instruction-compatible LGT8XM part with a 32 MHz internal RC and no crystal, a 12-bit ADC, an 8-bit DAC on D4, four timers, 80 mA drive pins, SWD instead of ICSP, and EEPROM emulated in program flash. Use when working on this board, any LGT8F328P/LGT8F328D/LGT8FX8P board, or a sketch being ported from an Arduino Nano or ATmega328P: PlatformIO setup with the lgt8fx core, platformio.ini, f_cpu/f_osc/clock_source and why timings come out 2x wrong, pin mapping and the LQFP32 bonded pads, analogRead resolution and reference errors, analogWrite hitting the DAC, EEPROM vanishing after upload, 80 mA outputs, upload failures over CH340/CH9340/HT42B534, SWD recovery, or debugging why something on the board does not work.

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Firmware development for the Waveshare ESP32-S3-RLCD-4.2 (SKU 33298 / 33507, and the -EN variant) — an ESP32-S3-WROOM-1-N16R8 AIoT board built around a 4.2" fully reflective 300x400 monochrome LCD on a Sitronix ST7305/ST7306, with no backlight, plus an ES8311 speaker codec, an ES7210 dual-microphone ADC, an SHTC3 temperature/humidity sensor, a PCF85063A RTC, a microSD/TF slot on SDMMC, an 18650 holder with battery sensing, BOOT/KEY/PWR buttons and a 2x8 2.54 mm expansion header. Use when working on this board: project setup, platformio.ini, the qio_opi PSRAM memory type, the pin map and which header pins are traps, U8g2 and the ST7305 constructor, a blank or shifted panel, ST7305 low-power mode HPM/LPM, the shared I2C bus and its four slaves, I2S audio directions and the speaker amplifier enable, mounting the TF card, battery voltage, USB CDC console with no UART bridge, flashing over Type-C, deep sleep, or debugging why something on the board does not work.

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Firmware development for the WeAct Studio RP2350A Core Board (RP2350A — dual Cortex-M33 @ 150 MHz, 520 KB SRAM, 4 MB or 16 MB QSPI flash) in both of its revisions, RP2350A_V10 and RP2350A_V20 — the 40-pin Pico-2-shaped header, 3-or-4-channel 12-bit ADC, PWM, PIO, USB-C CDC, the V1.0 LDO vs V2.0 buck-boost power wiring, and the PlatformIO + arduino-pico (earlephilhower) setup around them. Use when working on this board, a WeAct RP2350 core board of unknown revision, or any Raspberry Pi Pico 2 / RP2350A clone: project setup, platformio.ini, board = rpipico2 vs weact_rp2350b, telling V1.0 and V2.0 apart, pin mapping, LED and KEY pins, powering it from a battery, 4 MB vs 16 MB flash, erratum RP2350-E9 pull-down trouble, BOOT/RESET UF2 flashing, or debugging why something on the board does not work.

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Firmware development for the Arduino Nano (A000005, ATmega328P @ 16 MHz, 5 V) — its 30 KB usable flash, 2 KB SRAM, 1 KB EEPROM, 8-channel 10-bit ADC, six 8-bit PWM pins across three timers, UART shared with the USB-serial chip, I2C on A4/A5, SPI on D10–D13, sleep modes, and the Arduino AVR core + PlatformIO setup around them. Use when working on this board or any ATmega328P Nano clone (FTDI or CH340 USB): project setup, platformio.ini, old-vs-new bootloader uploads, pin mapping, A6/A7 restrictions, timer/Servo/tone conflicts, the 2 KB SRAM budget, analog references, powering from VIN, ICSP recovery, or debugging why something on the board does not work.

日本語の概要は準備中です。原文の説明を表示しています。

Firmware development for the 30-pin ESP32-WROOM-32 development board — the DOIT ESP32 DevKit V1 / ESP32 CH340 Type-C / NodeMCU-ESP32 30-pin form factor, 15 pins per side, CH340G or CP2102 USB-UART bridge, AMS1117 LDO, user LED on GPIO2. Use when working on a 30-pin ESP32 devkit (ESP32-D0WDQ6 / ESP32-D0WD-V3, ESP-WROOM-32 module): project setup, platformio.ini and sdkconfig for ESP-IDF or Arduino, pin mapping and which GPIOs are safe, strapping pins, ADC1 vs ADC2 with Wi-Fi, SPI speed and IO_MUX pins, I2C, deep sleep and RTC wake pins, flashing over the CH340 bridge, BOOT/EN recovery, brownouts, or debugging why something on the board does not work.

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Firmware development for the <VENDOR> <BOARD NAME> (<MCU PART NUMBER>) — its <peripheral>, <peripheral>, <peripheral>, and the <SDK/HAL> + <build system> setup around them. Use when working on this board or any <compatible siblings>: project setup, <config file>, clock configuration, pin mapping, peripheral bring-up, <the board's headline concern>, flashing, or debugging why something on the board does not work.

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Firmware development for the Raspberry Pi Pico (original, RP2040 — dual Cortex-M0+ @ 133 MHz, 264 KB SRAM, 2 MB QSPI flash) — its 26 exposed GPIO, 4-channel 12-bit ADC, 16-channel PWM, 2× UART/I2C/SPI, PIO state machines, USB 1.1 CDC, VSYS/VBUS/SMPS power wiring, and the PlatformIO + arduino-pico (earlephilhower) setup around them. Use when working on this board, any Pico H or Pico clone, or a bare RP2040: project setup, platformio.ini, the earlephilhower-vs-Mbed core choice, pin mapping, USB CDC serial, analogRead/analogWrite behaviour, Wire/SPI defaults, battery power, EEPROM emulation, BOOTSEL/UF2 flashing, or debugging why something on the board does not work.

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Turn Chinese text, articles, URLs, or user-defined page plans into polished 1080×1440 Xiaohongshu image-card series in the Quiet Signal visual language. Use when creating, revising, rendering, or visually auditing 小红书图文; use quiet-signal-design alone for non-Xiaohongshu design work.

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Apply or audit the approved Quiet Signal core visual language when the user explicitly asks for Quiet Signal styling on a defined website, interface, poster, social graphic, report, presentation, or other design artifact. This skill supplies visual identity and rule checks; it does not plan content, invent platform requirements, or run a production pipeline.

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Expert in phenomenological method and existentialist philosophy from Husserl through Sartre, Heidegger, and Merleau-Ponty

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Comprehensive astrology expert covering natal charts, transits, houses, aspects, and astrological traditions from Western to Vedic

日本語の概要は準備中です。原文の説明を表示しています。

Comprehensive Japanese grammar expert covering particles, verb conjugations, sentence patterns, and the nuances between spoken and written Japanese

日本語の概要は準備中です。原文の説明を表示しています。

Expert in French pastry techniques, from croissants to éclairs, macarons to tarte tatin

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Generate Excalidraw architecture diagrams (.excalidraw JSON files) from your codebase. Triggers: you need whiteboard-style sketches that read as a thinking artifact rather than a polished spec — ideal for design.

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Set up mobile CI/CD pipelines for Flutter, React Native, or native iOS/Android — GitHub Actions workflows for testing, code signing, TestFlight/Play Store distribution, build number management, Fastlane integration, and artifact retention

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Generate production-grade Kubernetes manifests — Deployments with probes and security contexts, Services, Ingress with TLS, HPA, PDB, NetworkPolicy, ConfigMaps, Secrets — with optional Helm charts, Kustomize overlays, Istio mesh, and ArgoCD GitOps

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Analyze vendor management systems for performance scorecards, third-party risk assessment, SLA enforcement, vendor rationalization, and relationship governance.

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Audit a codebase for product-market fit readiness -- evaluate startup PMF signals, core value loop tightness, feature scatter vs focus ratio, user activation funnel friction, retention hook infrastructure, pricing flexibility, analytics event coverage, CI/CD iteration speed, and growth-stage maturity for pre-seed through Series A products.

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Analyze smart grid and power distribution optimization code for power flow solver correctness, fault detection and restoration automation, distributed energy resource management, voltage regulation, SCADA integration, and cybersecurity posture..

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Audit laboratory automation systems -- LIMS architecture, instrument connectivity (SiLA 2, OPC-UA, serial drivers), sample tracking and chain of custody, protocol workflow engines, data acquisition pipelines, and regulatory compliance (21 CFR Part 11 electronic records/signatures.

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Profile and audit mobile app performance -- cold/warm/hot startup time, memory leaks, battery drain, network efficiency, frame rate jank, and binary size. Triggers: diagnosing slow launches, investigating ANRs, reducing app size, or benchmarking rendering performance.

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Analyze university and research institution funding allocation systems including RCM revenue attribution, performance-based budgeting, faculty startup package management, F&A indirect cost recovery distribution, equipment sharing and core facility recharge rates.

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Analyze manufacturing defect detection and quality control systems — computer vision inspection pipelines, SPC control charts, Six Sigma process capability (Cp/Cpk), defect classification taxonomies, root cause analysis tooling, and measurement system analysis.

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Analyze disaster prediction and early warning systems — model accuracy for flood, earthquake, wildfire, hurricane, and tsunami hazards, data pipeline reliability from sensor networks and satellite feeds, alert distribution latency and channel coverage.

日本語の概要は準備中です。原文の説明を表示しています。