280 件 ・ 関連度順
概要と使いどころ
Run evaluations for Hugging Face Hub models using inspect-ai and lighteval on local hardware. Use for backend selection, local GPU evals, and choosing between vLLM / Transformers / accelerate. Not for HF Jobs orchestration, model-card PRs, .eval_results publication, or community-evals automation.
日本語の概要は準備中です。原文の説明を表示しています。
Design, implement, optimize, and review SIMD code in .NET. USE FOR: vectorizing scalar loops with TensorPrimitives, Vector64/128/256/512, or platform hardware intrinsics; reviewing existing SIMD code, including the generic Vector type, for contract equivalence, tail handling, memory safety, portability, fallbacks, and measured performance. DO NOT USE FOR: performance work unrelated to SIMD or vectorization.
日本語の概要は準備中です。原文の説明を表示しています。
Migrate a .NET 10 project or solution to .NET 11 and resolve all breaking changes. This is a MIGRATION skill — use it when upgrading from .NET 10 to .NET 11, NOT for writing new programs. USE FOR: upgrading TargetFramework from net10.0 to net11.0, fixing build errors after updating the .NET 11 SDK, resolving source-breaking and behavioral changes in .NET 11 runtime, C# 15 compiler, and EF Core 11, adapting to updated minimum hardware requirements (x86-64-v2, Arm64 LSE), and updating CI/CD pipelines and Dockerfiles for .NET 11. DO NOT USE FOR: .NET Framework migrations, upgrading from .NET 9 or earlier, greenfield .NET 11 projects, or cosmetic modernization unrelated to the upgrade. NOTE: .NET 11 is in preview. Covers breaking changes through Preview 3.
日本語の概要は準備中です。原文の説明を表示しています。
Use when configuring, repairing, planning, or running MiniMax H3 locally on a Windows NVIDIA computer, especially when installation compatibility, component sets, resolution, generation-time budget, path, low-VRAM risk, or H3 prompt mode must be chosen from hardware and user requirements.
日本語の概要は準備中です。原文の説明を表示しています。
Cross-engine decision rubric for self-hosting or recommending an LLM serving stack. Picks among vLLM, SGLang, TensorRT-LLM, TGI, llama.cpp, Ollama, and MLX as a function of (hardware × workload × constraint), not "which is fastest". Activates whenever a coder-agent must choose, defend, or migrate a serving runtime.
日本語の概要は準備中です。原文の説明を表示しています。
Lab automation platform for Flex/OT-2 robots. Write Protocol API v2 protocols, liquid handling, hardware modules (heater-shaker, thermocycler), labware management, for automated pipetting workflows.
日本語の概要は準備中です。原文の説明を表示しています。
Quantum computing framework for building, simulating, optimizing, and executing quantum circuits. Use this skill when working with quantum algorithms, quantum circuit design, quantum simulation (noiseless or noisy), running on quantum hardware (Google, IonQ, AQT, Pasqal), circuit optimization and compilation, noise modeling and characterization, or quantum experiments and benchmarking (VQE, QAOA, QPE, randomized benchmarking).
日本語の概要は準備中です。原文の説明を表示しています。
Hardware-agnostic Python liquid-handler library: portable scripts run on Hamilton STAR, Tecan Freedom EVO, Opentrons OT-2, or a simulator without vendor lock-in. For protocol automation, method dev, plate reformatting, serial dilutions, and Python lab workflows.
日本語の概要は準備中です。原文の説明を表示しています。
Architecture patterns, design principles, and proven recipes for building robust robotics software. Use this skill when designing robot software architectures, choosing between behavioral frameworks, structuring perception-planning-control pipelines, implementing state machines, designing safety systems, or architecting multi-robot systems. Trigger whenever the user mentions behavior trees, finite state machines, subsumption architecture, sensor fusion, robot safety, watchdogs, heartbeats, graceful degradation, hardware abstraction layers, real-time constraints, or software architecture for robots. Also applies to sim-to-real transfer, digital twins, and robot fleet management.
日本語の概要は準備中です。原文の説明を表示しています。
Foundational software design principles applied specifically to robotics module development. Use this skill when designing robot software modules, structuring codebases, making architecture decisions, reviewing robotics code, or building reusable robotics libraries. Trigger whenever the user mentions SOLID principles for robots, modular robotics software, clean architecture for robots, dependency injection in robotics, interface design for hardware, real-time design constraints, error handling strategies for robots, configuration management, separation of concerns in perception-planning- control, composability of robot behaviors, or any discussion of software craftsmanship in a robotics context. Also trigger for code reviews of robotics code, refactoring robot software, or designing APIs for robotics libraries.
日本語の概要は準備中です。原文の説明を表示しています。
Turn 2+ user reference images into a high-fidelity animated Codex companion using PocketMen's own local stack. Prefer the open-weight Neural Local Studio (FLUX.2 klein 4B; optional Qwen-Image-Edit-2511 Identity-Max) on compatible hardware; otherwise fall back to the deterministic local renderer. Never require hatch-pet or OPENAI_API_KEY for the normal workflow.
日本語の概要は準備中です。原文の説明を表示しています。
Use when the user needs engineering or research-paper figures: system architecture diagrams, algorithm workflows, hardware schematics, benchmark charts, ablation plots, figure briefs, redraws, image edits, or exact publication-style plots from numeric data. Covers Gemini, Nano Banana, OpenAI image models, and local plotting workflows.
日本語の概要は準備中です。原文の説明を表示しています。
Maintain IT asset inventory and configuration management database. Track hardware, software, and cloud resources. Use when managing IT assets.
日本語の概要は準備中です。原文の説明を表示しています。
Video/audio/image processing with FFmpeg and ImageMagick. Tools: FFmpeg (video/audio), ImageMagick (images). Capabilities: format conversion, encoding (H.264/H.265/VP9/AV1), streaming (HLS/DASH), filters, effects, thumbnails, watermarks, batch processing, hardware acceleration (NVENC/QSV). Actions: convert, encode, resize, crop, compress, extract, merge, stream, transcode media. Keywords: FFmpeg, ImageMagick, video encoding, audio extraction, image resize, thumbnail, watermark, HLS, DASH, H.264, H.265, VP9, AV1, codec, bitrate, framerate, resolution, aspect ratio, filter, overlay, concat, trim, fade, batch processing. Use when: converting video/audio formats, encoding with specific codecs, generating thumbnails, creating streaming manifests, extracting audio from video, batch processing images, adding watermarks, optimizing file sizes.
日本語の概要は準備中です。原文の説明を表示しています。
Applies the reasoning, principles, and mental models of Sebastian Thrun (robotics and self-driving cars pioneer, founder of Google X, Waymo, Udacity, Stanford University). Reach for this skill whenever Claude is asked to advise on hardware/software systems engineering, autonomous vehicles, moonshot ideation, probabilistic robotics (SLAM), or leading high-stakes engineering teams. Trigger this skill for discussions on democratizing education, regulating AI, transitioning from academic research to product development, or managing technical teams with empathy. Use it to shift focus from incremental component debates to end-to-end execution and audacious goals.
日本語の概要は準備中です。原文の説明を表示しています。
Applies the engineering and research philosophies of Jeff Dean, Chief Scientist at Google DeepMind and Google Research. Reach for this skill whenever you are designing large-scale distributed systems, optimizing latency and energy efficiency, or making architectural decisions about machine learning infrastructure. It should trigger automatically for topics involving hardware-ML co-design, model distillation, sparse activation, massively multi-task models, or scaling systems by 5x to 10x. Use this skill to evaluate system bottlenecks, transition from specialized to unified models, and optimize experimental velocity. Apply his mental models to avoid premature 100x scaling and to treat AI models as reasoning engines rather than memorization databases.
日本語の概要は準備中です。原文の説明を表示しています。
Applies the reasoning style of Geoffrey Hinton, deep learning pioneer and 2018 Turing Award winner. Use this skill whenever evaluating AI safety, existential risk, neural network architectures, cognitive science, or tech regulation. Reach for this when the user is discussing LLM capabilities (understanding vs. autocomplete), the biological vs. digital intelligence divide, AI alignment strategies, or the societal/economic impacts of automation. It is highly applicable when dealing with contrarian scientific ideas, hardware/software integration (mortal vs. immortal computing), or global cooperation on technological threats. Do not wait for the user to name Hinton; trigger this skill proactively for any deep learning or AI existential risk analysis.
日本語の概要は準備中です。原文の説明を表示しています。
Applies the reasoning of Pieter Abbeel, robotics and reinforcement learning expert, UC Berkeley professor, and co-founder of Covariant. Use this skill whenever you are designing AI systems, tackling Sim2Real transfer, deploying machine learning in the physical world, or evaluating reinforcement learning architectures. Trigger this skill for questions about domain randomization, reward design, bootstrapping real-world AI, robotics hardware assumptions, or shifting from hard-coded rules to data-driven deep learning. It helps ground theoretical AI in physical embodiment and pragmatic deployment.
日本語の概要は準備中です。原文の説明を表示しています。
Translate natural-language requirements or structured specification documents into formal temporal logic properties (LTL, CTL, safety/liveness properties). Use when users need to formalize requirements for model checking, formal verification, or property specification. Handles embedded/real-time systems, hardware verification, concurrent systems, and reactive systems. Resolves ambiguities, asks clarifying questions when needed, and outputs machine-checkable formulas with explanations. Supports multiple output formats (SPIN, NuSMV, Uppaal, TLA+, Maude).
日本語の概要は準備中です。原文の説明を表示しています。
Hardware verification tool for checking functional equivalence between two RTL designs (Verilog). Use when users need to: (1) Verify if two RTL versions are functionally equivalent, (2) Compare original vs. refactored RTL code, (3) Validate design changes or optimizations, (4) Identify semantic vs. cosmetic differences, (5) Generate counterexamples for non-equivalent designs. Analyzes interface alignment, state variables, logic differences, and produces detailed equivalence verdicts with plain language explanations. Particularly effective for design verification, code reviews, and regression testing of RTL modifications.
日本語の概要は準備中です。原文の説明を表示しています。
Automatically infer formal correctness properties from Verilog/SystemVerilog RTL code and generate SystemVerilog Assertions (SVA). Identifies control-flow invariants (mutual exclusion, valid-ready handshakes, pipeline ordering, safety properties), liveness expectations, and temporal properties. Use when working with RTL designs that need formal property generation, when adding assertions to existing RTL, or when users ask to infer properties, generate assertions, or create formal specifications from hardware designs.
日本語の概要は準備中です。原文の説明を表示しています。
ROS 2 engineering: rclcpp/rclpy, colcon/ament, launch, QoS/DDS, tf2/URDF, ros2_control, Nav2, MoveIt 2, sensors, runtime/artifact provenance, and hardware safety. Use for development, review, debugging, and ROS 1 migration to ROS 2. Not for general C++/Python, unrelated middleware, or web/mobile tasks.
日本語の概要は準備中です。原文の説明を表示しています。
Legacy v1 (voiceover-led, GSAP + HyperFrames). Use when making, directing or rescuing a product launch video, promo, teaser, demo reel, sizzle, feature-announcement film or animated product explainer built from code — and when an existing one looks basic, reads as a slideshow, has reveals that miss the voiceover, an invisible cursor, an inaudible sound effect, a clipped or too-quiet mix, or every video coming out looking the same. Covers SaaS, apps, hardware, e-commerce, dev tools, services. Keywords include motion design, storyboard, voiceover sync, kinetic typography, GSAP, HyperFrames, Remotion, film grain, LUFS, ffmpeg.
日本語の概要は準備中です。原文の説明を表示しています。
Think and work like an expert Embedded Systems Engineer. Use when a task calls for Embedded Systems Engineer judgment. Reasons from hardware timing, interrupt latency, memory maps, and deterministic WCET resource bounds through DWT CYCCNT and Saleae logic-analyzer timing proofs, SWD/JTAG (J-Link/OpenOCD) with CFSR/HFSR/BFAR fault decode, FreeRTOS/Zephyr respecting configMAX_SYSCALL_INTERRUPT_PRIORITY, MISRA C:2012 and ISO 26262 ASIL discipline, Nordic PPK2 power profiling, and MCUboot signed OTA while treating priority inversion, Cortex-M7 uncached-DMA D-cache incoherence, CAN bus-off, I2C NACK storms, and brownout-during-flash-write NVS corruption as first-class failure modes.
日本語の概要は準備中です。原文の説明を表示しています。