Other skills

Maintains this project's retrospective findings, separates project and shared responsibility, follows adopted fixes through observation and recurrence, and queues zero to three supported new leading improvement stories, then commits and synchronizes the maintenance result. Use only on explicit invocation or as an expressly named phase of a user-invoked combined cycle for its selected project set. Reading findings or completing a retrospective does not invoke it. Does not implement the improvements.

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Apply the latest released Open Dough guidance from this project's recorded source, or from a supplied repository URL on first install. Use when the user asks to update Open Dough or invokes dough-update.

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Dough Land lands everything in one reviewed checkout on the authorized remote trunk: commits all of its changes, reconciles and publishes them without force, and refreshes a supplied default checkout when safe. An owned worktree is retired with its branch after completion gates hold and trunk contains its work; the default checkout stays in place. Ordinary landing refuses unfinished execution before commit; `--keep-worktree` selects an explicit retained increment. Use only on explicit invocation, such as "/dough-land", "use Dough Land", "land this worktree", or "land" for changes made on the default checkout, or when another skill's validated keep instruction or findings maintenance handoff links here. A casual "keep", "looks good", or approval does not invoke it. Hosted merges and pull requests are out of scope. With `--process-retrospective`, it also reviews the landing's own process and records supported findings in `DearDough.md`.

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Finds and assesses existing solutions across the whole product before an implementation responsibility is added or relocated. Use for PFE, Proudly Found Elsewhere, or when deciding whether to reuse, change, modularize, or replace an existing product solution.

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去除 NSFC 标书中的 AI 机器味，覆盖词语、句法、段落和章节层，尤其处理伪对立、工程协议腔、规格书式字段串、术语漂移、定义后连续否定排除项、边界声明过重和研究动作不清（不适用：非标书内容/需修改格式/需补充新内容）；兼容旧名 nsfc-humanization 的润色请求

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调用 Magic 8.3.641 执行 PD 操作：floorplan / place / DRC / layout extraction。触发场景：(1) bba-guru-pd 做 floorplan 与 placement；(2) routing 后做 DRC；(3) LVS 前 extract SPICE；(4) 显式 /bb-invoke-magic。

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从粗略 idea 设计芯片或功能模块架构，输出专业架构文档到 spec_arch 目录。Trigger: 芯片架构设计, IC架构, 电路模块设计, 硬件架构. Generate IC/Chip architecture specification from rough ideas.

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调用 babel-lsp / verible-verilog-lint 检查 SV 源码。src 必须可综合（零 syntax error），tb 允许 verification constructs。发现 src error 时自动修复重检（max 3 iter）。触发：(1) bba-guru-rtl 生成后；(2) RTL 修复重检；(3) 显式 /bb-check-lint。

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<一句话说清『这个 skill 做什么 + 何时调用』。把最关键的触发场景放最前面。结尾给 2-3 个用户会说的关键词。>

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调用 KLayout 0.30.8 执行 GDSII 导出（stream out）、GDS-level DRC、或导出后 verify。PD 流程末尾产出最终 .gds（signoff 产物）。触发场景：(1) bba-guru-pd routed 后 GDS export；(2) GDS 层 DRC 检查；(3) 导出后 verify；(4) 显式 /bb-invoke-klayout。

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统一质量门禁：RTL / 综合 / 测试 / PD 四阶段验收。调用共享 gate_runner.py 参数化。触发：(1) bba-guru-* 在阶段结束时调用；(2) 显式 /bb-gate <domain>。

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基于 AST 检查 CDC/RDC 违例：对比 MAS clock_domains 找跨域信号，检查是否被 2ff-sync CBB 保护。触发场景：(1) bba-guru-synthesis 综合前；(2) 显式 /bb-check-cdc。

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读取指定 CBB / protocol wiki 文件，解析其 ## Interface / ## Ports section，返回结构化端口表 + 参数表。bba-architect 用于填入 MAS 模块接口。触发场景：(1) bb-search-cbb 命中后取详细接口；(2) 显式 /bb-get-interface-template。

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在 AST JSON 上做信号路径追踪：source → sink 提取跨模块层次的传播路径，判定是否跨时钟域。供 CDC violation 根因分析与 critical path 辅助。触发场景：(1) bb-check-cdc 报 violation 需取证；(2) 综合 critical path 分析；(3) 显式 /bb-trace-signal-path。

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对规格文档（PRD + arch_spec + MAS）做对抗性评审：完整性 / 一致性 / 可实现性 / 验证覆盖。默认 role=ruthless（规格阶段错误成本最高）。在 MAS frozen 前调用。触发场景：(1) bba-architect 写完 MAS；(2) 显式 /bb-spec-review。

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在 wiki/protocols/ 搜索协议知识（UART/AXI4-Lite/UCIe 等），返回匹配的文档路径与摘要。触发场景：(1) bba-architect 写 PRD/MAS 时需查协议规格；(2) 显式 /bb-search-protocol。

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在 wiki/cbb/ 搜索可复用 Common Building Block（sync-fifo / 2ff-sync / clock-gate 等），返回匹配模板路径。bba-architect 在 MAS 中识别复用组件时调用。触发场景：(1) bba-architect 拆分子模块识别 CBB；(2) 显式 /bb-search-cbb。

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生成芯片功能模块微架构文档（MAS、FSM、数据通路、验证计划、DFT）。Generate microarchitecture specification for chiplet modules. Trigger: /bb-mas, 微架构文档, MAS, FSM, datapath, verification plan, DFT

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调用 Verilator 5.012 编译 RTL + TB 并跑 coverage-driven simulation，产出 sim log / coverage.dat / VCD。触发场景：(1) bba-guru-verification 完成 TB 后跑回归；(2) RTL 修复后回归验证；(3) 显式 /bb-invoke-verilator。

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调用 QRouter 1.4 对 placed DEF 执行 detail routing，产出 routed.def。触发场景：(1) bba-guru-pd 在 placement 完成后做布线；(2) 显式 /bb-invoke-qrouter。

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**[DEPRECATED in v1.3 — common path uses bb-invoke-yosys' embedded ABC]** 独立调用 ABC（Berkeley Logic Synthesis）做逻辑优化，仅 `mapping_effort=high` 等高级调优场景使用。触发场景：(1) bb-invoke-yosys `chain_to_abc=true` 时；(2) 显式 /bb-invoke-abc 调试。

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扫描 RTL 目录提取模块层次依赖，拓扑排序后写 file_list.f（叶模块在前，top 在最后），供 Yosys/Verilator 使用。触发场景：(1) bba-guru-rtl 生成 RTL 后生成 file_list；(2) 显式 /bb-find-module-deps。

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从 MAS（clock_domains / io_timing / path_exceptions）派生 Synopsys SDC 时序约束文件，OpenSTA 语法校验。触发场景：(1) bba-guru-synthesis 综合前；(2) post-PD timing fail 修订约束；(3) 显式 /bb-create-sdc。

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从 MAS（io_ring/pad_list/clock_plan）+ 综合网表生成 Magic floorplan TCL，交给 bb-invoke-magic 执行。触发场景：(1) bba-guru-pd 综合后做 floorplan；(2) DRC 失败后调整 utilization 重生成；(3) 显式 /bb-create-floorplan。

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